公开(公告)号：US20180182846A1

公开(公告)日：2018-06-28

申请号：US15820053

申请日：2017-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MYOUNG-HO KANG ,  JUNG-HO DO ,  GIYOUNG YANG ,  SEUNGYOUNG LEE

IPC: H01L29/06 ,  H01L27/092 ,  H01L29/08 ,  H01L29/78 ,  H01L21/8238

CPC classification number: H01L29/0653 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/78 ,  H01L29/7848

Abstract: A semiconductor device includes a substrate that includes active patterns extending in a second direction, a third device isolation layer disposed on an upper portion of the substrate that includes a PMOSFET region and an NMOSFET region, and a gate electrode that extends across the active patterns in a first direction that crosses the second direction. The active patterns extend across the PMOSFET region and the NMOSFET region. The third device isolation layer lies between the PMOSFET region and the NMOSFET region. The third device isolation layer comprises a first part that extends in the second direction and a second part that extends in a third direction that crosses the first and second directions. The second part has opposite sidewalls parallel to the third direction, in a plan view.