公开(公告)号：US20190155174A1

公开(公告)日：2019-05-23

申请号：US16196626

申请日：2018-11-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae-sun KIM ,  Young-sik PARK ,  Min-keun KWAK ,  Byoung-hoon KIM ,  Yong-chul KIM ,  Hyun-jeong LEE ,  Sung-won CHOI

IPC: G03F7/20 ,  G06T7/00 ,  H01L23/544 ,  H01L21/68 ,  G01N21/956 ,  G01N21/95

CPC classification number: G03F7/70633 ,  G01N21/9501 ,  G01N21/95607 ,  G06T7/001 ,  G06T2207/10061 ,  G06T2207/30148 ,  H01L21/681 ,  H01L23/544 ,  H01L2223/54426

Abstract: A semiconductor device includes a semiconductor substrate including an in-cell area and a scribe lane defining the in-cell area, a first overlay pattern on the semiconductor substrate, and a second overlay pattern adjacent to the first overlay pattern, wherein the first overlay pattern is a diffraction-based overlay (DBO) pattern and the second overlay pattern is a scanning electron microscope (SEM) overlay pattern.