Abstract:
A timing controller includes a timing generation circuit configured to generate a plurality of timing control signals to control timing of image data displayed on a flat display panel, in response to a plurality of control signals, and a command generation circuit configured to analyze a sensing signal output by at least one sensor and generate a command associated with processing of the image data based on a result of the analysis. The command generation circuit may be built within a data driver or may be implemented by using a separate dedicated chip.
Abstract:
A system on chip structured in a second network device is provided. The system on chip includes: a first resource which is structured as at least one of hardware and software; a resource management module; and a processor configured to control or execute the resource management module to monitor a state of the first resource, and manage a sharing condition of the first resource to be shared by a first network device and the second network device and shared information of at least one second resource which is hardware and/or software, currently shared by the second network device and a third network device.