Abstract:
A crystal oscillator including a feedback circuit, and a reference clock generating circuit including the crystal oscillator. The crystal oscillator is configured to generate an oscillating signal based on a natural frequency of a crystal. The crystal oscillator may include: a current generating circuit connected to a first node having a first voltage and a second node having a second voltage, and configured to output a first current to the second node; a feedback circuit connected to the generating circuit via the first and second nodes and configured to adjust a level of the second voltage by controlling a level of the first voltage; and a crystal circuit connected to the second node and configured to generate the oscillating signal based on the second voltage.
Abstract:
Provided is clock signal generator configured to generate a target output clock signal based on a reference clock signal, the clock signal generator includes a digital-to-time converter (DTC) configured to delay a reference clock signal based on an input code to generate a delay clock signal, and output the delay clock signal, a DTC controller configured to determine an initial gain value of the DTC based on a result of comparing at least one delay amount of the DTC with a period of a previously generated output clock signal, and generate the input code based on the initial gain value, and a phase locked loop configured to generate the target output clock signal based on the delay clock signal and a division clock signal of the previously generated output clock signal, the target output clock signal being locked to the delay clock signal.
Abstract:
A crystal oscillator including a feedback circuit, and a reference clock generating circuit including the crystal oscillator. The crystal oscillator is configured to generate an oscillating signal based on a natural frequency of a crystal. The crystal oscillator may include: a current generating circuit connected to a first node having a first voltage and a second node having a second voltage, and configured to output a first current to the second node; a feedback circuit connected to the generating circuit via the first and second nodes and configured to adjust a level of the second voltage by controlling a level of the first voltage; and a crystal circuit connected to the second node and configured to generate the oscillating signal based on the second voltage.
Abstract:
An X-ray detector may include a silicon substrate including a first area and a second area; a plurality of pixels in the first area configured to detect X-rays; a control pad in the second area configured to supply a common control signal to the plurality of pixels; and/or a power supply pad in the first area configured to supply a power supply voltage to groups of pixels grouped from among the plurality of pixels.
Abstract:
A photon counting detector and a photon counting and detecting method using the same is provided. The photon counting detector includes readout circuits configured to count photons in multi-energy radiation incident to a sensor, the photons being counted with respect to each of a plurality of energy bands of the multi-energy radiation, the readout circuits respectively corresponding to pixels of a region onto which the multi-energy radiation is irradiated, each of the readout circuits being configured to count photons in a predetermined one of the energy bands, at least one of the readout circuits being configured to count photons in at least one of energy bands other than the predetermined one of the energy bands.
Abstract:
Provided is clock signal generator configured to generate a target output clock signal based on a reference clock signal, the clock signal generator includes a digital-to-time converter (DTC) configured to delay a reference clock signal based on an input code to generate a delay clock signal, and output the delay clock signal, a DTC controller configured to determine an initial gain value of the DTC based on a result of comparing at least one delay amount of the DTC with a period of a previously generated output clock signal, and generate the input code based on the initial gain value, and a phase locked loop configured to generate the target output clock signal based on the delay clock signal and a division clock signal of the previously generated output clock signal, the target output clock signal being locked to the delay clock signal.
Abstract:
Provided is clock signal generator configured to generate a target output clock signal based on a reference clock signal, the clock signal generator includes a digital-to-time converter (DTC) configured to delay a reference clock signal based on an input code to generate a delay clock signal, and output the delay clock signal, a DTC controller configured to determine an initial gain value of the DTC based on a result of comparing at least one delay amount of the DTC with a period of a previously generated output clock signal, and generate the input code based on the initial gain value, and a phase locked loop configured to generate the target output clock signal based on the delay clock signal and a division clock signal of the previously generated output clock signal, the target output clock signal being locked to the delay clock signal.
Abstract:
A photon counting detector and a photon counting and detecting method using the same is provided. The photon counting detector includes readout circuits configured to count photons in multi-energy radiation incident to a sensor, the photons being counted with respect to each of a plurality of energy bands of the multi-energy radiation, the readout circuits respectively corresponding to pixels of a region onto which the multi-energy radiation is irradiated, each of the readout circuits being configured to count photons in a predetermined one of the energy bands, at least one of the readout circuits being configured to count photons in at least one of energy bands other than the predetermined one of the energy bands.