-
公开(公告)号:US20240324201A1
公开(公告)日:2024-09-26
申请号:US18441645
申请日:2024-02-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kang Lib KIM , Seahoon LEE , Junhee LIM
Abstract: A semiconductor memory device includes a substrate, a plurality of gate stack structures on the substrate that include a plurality of gate lines stacked and a plurality of insulating films between the plurality of gate lines, a plurality of first separation insulating films that are alternately stacked with the plurality of gate lines, where the plurality of gate stack structures and the plurality of first separation insulating films define a contact hole, a contact electrode that is in the contact hole and contacts the plurality of gate stack structures, and one or more second separation insulating film that is on an uppermost gate line of one or more of the plurality of gate stack structures and separates the contact electrode from the uppermost gate line.
-
公开(公告)号:US20240121952A1
公开(公告)日:2024-04-11
申请号:US18232568
申请日:2023-08-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sohyeon LEE , Seahoon LEE , Jaeduk LEE , Tackhwi LEE
Abstract: A vertical memory device includes a substrate, first and second sub-semiconductor patterns, first and second common source contacts, and first and second cell structures. The substrate includes a first region and a second region having a same length as the first region in a first direction, the first region having a first width in a second direction perpendicular to the first direction, and the second region having a second width in the second direction that is less than the first width. The first sub-semiconductor pattern covers the first region, and a portion of the first sub-semiconductor pattern has a first thickness. The second sub-semiconductor pattern covers the second region and has a second thickness that is less than the first thickness. The first and second common source contacts are disposed on edges in the second direction of the first and second patterns, respectively.
-