公开(公告)号：US12279427B2

公开(公告)日：2025-04-15

申请号：US17750586

申请日：2022-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Na-Young Kim ,  Seongho Kim ,  Hoonmin Kim

IPC: H10B41/42 ,  H10B41/41

Abstract: A semiconductor device includes a substrate including cell and peripheral regions. Landing pads and contact plugs are on the cell and peripheral regions, respectively. A first filler pattern fills regions between the landing pads and between the contact plugs. Outer voids are in the first filler pattern and include first and second outer voids on the cell and peripheral regions, respectively. A second filler pattern covers the first filler pattern and the contact plugs and fills at least a portion of the second outer void. An inner void is in the second outer void and enclosed by the second filler pattern. The first and second filler patterns include the same material. On the cell region, at least a portion of the second filler pattern is located below top surfaces of the landing pads, and a bottom surface of the second filler pattern is partially exposed by the first outer void.

公开(公告)号：US10217747B2

公开(公告)日：2019-02-26

申请号：US15196612

申请日：2016-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongho Kim

IPC: H01L27/088 ,  H01L27/108

Abstract: According to example embodiments, a semiconductor device may include a substrate having an upper surface defining a groove and an active region, a device isolation layer in the groove, and a contact structure on the active region. The device isolation exposes the active region and may have a top surface that is higher than a top surface of the active region. The contact structure may include a first portion filling a gap region delimited by a sidewall of the device isolation layer and the top surface of the active region, the contact structure may include and a second portion on the device isolation layer so the second portion overlaps with the device isolation layer in a plan view.

公开(公告)号：US20230084281A1

公开(公告)日：2023-03-16

申请号：US17750586

申请日：2022-05-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Na-Young Kim ,  Seongho Kim ,  Hoonmin Kim

IPC: H01L27/11531 ,  H01L27/11529

Abstract: A semiconductor device includes a substrate including cell and peripheral regions. Landing pads and contact plugs are on the cell and peripheral regions, respectively. A first filler pattern fills regions between the landing pads and between the contact plugs. Outer voids are in the first filler pattern and include first and second outer voids on the cell and peripheral regions, respectively. A second filler pattern covers the first filler pattern and the contact plugs and fills at least a portion of the second outer void. An inner void is in the second outer void and enclosed by the second filler pattern. The first and second filler patterns include the same material. On the cell region, at least a portion of the second filler pattern is located below top surfaces of the landing pads, and a bottom surface of the second filler pattern is partially exposed by the first outer void.