Abstract:
A display driver integrated circuit and a method of manufacturing the same are provided. The method of manufacturing a display driver integrated circuit (DDI) including a first area, a second area, and an overlapping area in which the first area and the second area overlap each other includes forming a first pattern in the first area using a first reticle; and forming a second pattern in the second area using a second reticle, and ends of the first pattern and the second pattern are connected within the overlapping area and the first area and the second area are asymmetrically set based on the overlapping area such that the overlapping area includes only a metal line.
Abstract:
A semiconductor device may include an active pattern, a capacitor contact structure electrically connected to the active pattern, and a capacitor structure electrically connected to the capacitor contact structure. The capacitor structure may include a first lower electrode and a second lower electrode that are adjacent to each other, a supporter supporting the first and second lower electrodes, a capacitor insulating layer covering the first and second lower electrodes, and an upper electrode on the capacitor insulating layer. The supporter may include a first supporter curved sidewall connected to the first lower electrode and the second lower electrode, and the upper electrode may include an intervening electrode portion enclosed by the supporter. The first supporter curved sidewall may be convex toward the intervening electrode portion.
Abstract:
A display driving integrated circuit includes a timing controller, a first source driver including a first inverting input, a first non-inverting input, and a first output, a second source driver including a second inverting input, a second non-inverting input, and a second output, and a switching circuit connected with the display panel through a first and second pads. Under control of the timing controller, the switching circuit performs one of a first switching operation of connecting the first inverting input and the first output with the first pad, connecting the second inverting input and the second output with the second pad, and applying first and second decoding voltages to the non-inverting inputs, respectively; and a second switching operation of applying a sensing reference voltage to the non-inverting inputs, and connecting the output terminals with an output node, and connecting the inverting inputs with one pad.