公开(公告)号：US20230082930A1

公开(公告)日：2023-03-16

申请号：US17943932

申请日：2022-09-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dokyung LIM ,  Sounghun SHIN ,  Wooseok KIM ,  Wonsik YU ,  Chanyoung JEONG

IPC: H04L7/033 ,  H04L43/087

Abstract: A monitoring circuit for a high frequency signal includes: a phase locked loop configured to generate a divided output signal with respect to an input signal based on a plurality of dividers; a plurality of dividing monitoring circuits configured to receive dividing input signals and dividing output signals respectively corresponding to the plurality of dividers, and output dividing error signals; and a jitter monitoring circuit configured to output a jitter error signal.