公开(公告)号：US20230138845A1

公开(公告)日：2023-05-04

申请号：US17810929

申请日：2022-07-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joo Hwan KIM ,  Su Cheol LEE ,  Jin Do BYUN ,  Eun Seok SHIN ,  Young Don CHOI ,  Jung Hwan CHOI

IPC: G06F3/06 ,  G11C11/4096

Abstract: A memory device, a host device and a method of operating the memory device are provided. The memory device includes a data signal generator configured to provide a data signal to a transmission driver, the transmission driver configured to output a multi-level signal having any one of first to third signal levels based on the data signal, a command decoder configured to receive a feedback signal from outside of the memory device and decode the feedback signal, a data signal controller configured to adjust the data signal based on a decoding result of the command decoder, and a drive strength controller configured to adjust at least one of the first to third signal levels based on the decoding result of the command decoder.

公开(公告)号：US20220327067A1

公开(公告)日：2022-10-13

申请号：US17551781

申请日：2021-12-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang Kyu SEOL ,  Byung-Suk WOO ,  Su Cheol LEE

IPC: G06F13/16 ,  G11C7/10 ,  H04L1/00

Abstract: A signal processing method of a semiconductor device, the method including: receiving a first digital code of a first digital signal; generating a constraint vector; masking the first digital code with a transmitting mask based on the constraint vector; and outputting the masked first digital code and a Data Bus Inversion (DBI) bit of the mask.