公开(公告)号：US11765885B2

公开(公告)日：2023-09-19

申请号：US17210931

申请日：2021-03-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyewon Kim ,  Juhyung We ,  Sungmi Yoon ,  Donghyun Im ,  Sangwoon Lee ,  Taiuk Rim ,  Kyosuk Chae

IPC: H10B12/00 ,  H01L21/28 ,  H01L29/423 ,  H01L29/10 ,  H01L29/78

CPC classification number: H10B12/34 ,  H01L21/28044 ,  H01L29/1037 ,  H01L29/4236 ,  H01L29/7834 ,  H10B12/053 ,  H10B12/315

Abstract: A semiconductor device including a substrate including a recess; a gate insulation layer on a surface of the recess; a first gate pattern on the gate insulation layer and filling a lower portion of the recess; a second gate pattern on the first gate pattern in the recess and including a material having a work function different from a work function of the first gate pattern; a capping insulation pattern on the second gate pattern and filling an upper portion of the recess; a leakage blocking oxide layer on the gate insulation layer at an upper sidewall of the recess above an upper surface of the first gate pattern and contacting a sidewall of the capping insulation pattern; and impurity regions in the substrate and adjacent to the upper sidewall of the recess, each impurity region having a lower surface higher than the upper surface of the first gate pattern.