PROCESSING CIRCUITRY FOR PROCESSING DATA FROM SENSOR INCLUDING ABNORMAL PIXELS

    公开(公告)号:US20200260028A1

    公开(公告)日:2020-08-13

    申请号:US16590896

    申请日:2019-10-02

    Inventor: WONSEOK LEE

    Abstract: Processing circuitry may be configured to detect an abnormal pixel among a plurality of pixels based on pixel values of the plurality of pixels and one or more reference pixel values corresponding to the plurality of values; generate first encoded data by encoding pixel data of the plurality of pixels based on the pixel values with a first encoder; generate second encoded data by encoding the pixel data based on remaining pixels of the plurality of pixels excluding the detected abnormal pixel with a second encoder; and output the first encoded data or the second encoded data based on detecting the abnormal pixel.

    IMAGE SENSOR
    2.
    发明公开
    IMAGE SENSOR 审中-公开

    公开(公告)号:US20240047501A1

    公开(公告)日:2024-02-08

    申请号:US18345429

    申请日:2023-06-30

    CPC classification number: H01L27/14643 H01L27/14603 H01L27/14636

    Abstract: An image sensor includes a first substrate layer, a second substrate layer that is thicker than the first substrate layer, an inter-substrate insulating layer arranged between the first substrate layer and the second substrate layer, a first impurity region, a pair of second impurity regions, and a third impurity region, which are spaced apart from each other and arranged on some portions of the first substrate layer. The image sensor further includes a photodiode region constituting a photo sensing device arranged on the second substrate layer, a transfer transistor including a first gate electrode layer that fills a gate hole, penetrates the first substrate layer and the inter-substrate insulating layer, and extends to the second substrate layer, and a floating diffusion region arranged on a side of the first substrate layer and connected to the transfer transistor.

    DEVICE AND METHOD WITH MULTI-STAGE ELECTRICAL INTERCONNECTION NETWORK

    公开(公告)号:US20230254269A1

    公开(公告)日:2023-08-10

    申请号:US17941334

    申请日:2022-09-09

    CPC classification number: H04L49/1515 H04Q3/52

    Abstract: A device and method that implements a multi-stage electrical interconnection network is provided. The electronic device includes a plurality of computing devices and a plurality of switches grouped into a plurality of groups. Switches, of the plurality of switches, in a same group are configured to be fully connected to computing devices in the same group, each of switches of the plurality of switches included in a first group among the plurality of groups is configured to have a ono-to-one connection with any one of switches included in a second group, and a connection between the computing devices in the same group and the switches in the same group and a connection between switches in in the plurality of groups are electrical connections.

    DEVICE AND METHOD WITH MULTI-STAGE ELECTRICAL INTERCONNECTION NETWORK

    公开(公告)号:US20230412524A1

    公开(公告)日:2023-12-21

    申请号:US18460901

    申请日:2023-09-05

    CPC classification number: H04L49/1515 H04Q3/52

    Abstract: A device and method that implements a multi-stage electrical interconnection network is provided. The electronic device includes a plurality of computing devices and a plurality of switches grouped into a plurality of groups. Switches, of the plurality of switches, in a same group are configured to be fully connected to computing devices in the same group, each of switches of the plurality of switches included in a first group among the plurality of groups is configured to have a ono-to-one connection with any one of switches included in a second group, and a connection between the computing devices in the same group and the switches in the same group and a connection between switches in in the plurality of groups are electrical connections.

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