公开(公告)号：US09876094B2

公开(公告)日：2018-01-23

申请号：US14984037

申请日：2015-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Deok-Han Bae ,  Kyung-Soo Kim ,  Chul-Sung Kim ,  Woo-Cheol Shin ,  Hwi-Chan Jun

IPC: H01L29/66 ,  H01L29/45 ,  H01L21/8234 ,  H01L21/285 ,  H01L23/485 ,  H01L21/768 ,  H01L29/417 ,  H01L29/51 ,  H01L29/78

CPC classification number: H01L29/665 ,  H01L21/28518 ,  H01L21/76804 ,  H01L21/76805 ,  H01L21/76831 ,  H01L21/76843 ,  H01L21/76855 ,  H01L21/76865 ,  H01L21/823418 ,  H01L21/823437 ,  H01L23/485 ,  H01L29/41766 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66636 ,  H01L29/7848

Abstract: A method for fabricating a semiconductor device is provided. The method includes forming a gate electrode and a source or drain disposed at opposite sides of the gate electrode, forming an interlayer insulating layer covering the gate electrode and the source or drain, forming a contact hole exposing the source or drain in the interlayer insulating layer, forming a silicide layer on a bottom surface of the contact hole, and forming a spacer on sidewalls of the contact hole and an upper surface of the silicide layer.