公开(公告)号：US20210264965A1

公开(公告)日：2021-08-26

申请号：US17003038

申请日：2020-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woojin RIM ,  Yongho KIM ,  Hoonki KIM

IPC: G11C11/408 ,  G11C11/4074 ,  G11C11/4094 ,  G11C11/4097

Abstract: A memory device is provided. The memory device includes a cell array having memory cells; n word lines sequentially arranged and including a first word line, an n-th word line, and word lines interposed between the first word line and the n-th word line; bit lines; a first power node located adjacent to the first word line; a second power node located adjacent to the n-th word line; a first switch connected between the first power node and the cell array; a write driver located adjacent to the n-th word line and connected to the bit lines; and a switch controller configured to control the first switch to isolate the first power node from the memory cells during a write operation on memory cells connected to the first word line.

公开(公告)号：US20230040733A1

公开(公告)日：2023-02-09

申请号：US17846606

申请日：2022-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jisu YU ,  Woojin RIM ,  Jungho DO ,  Jaewoo SEO ,  Hyeongyu YOU ,  Minjae JEONG

IPC: H01L27/02 ,  H01L27/092 ,  H01L27/088 ,  H01L21/8234 ,  H01L21/8238

Abstract: Provided is an integrated circuit including standard cells arranged over a plurality of rows. The standard cells may include: a plurality of functional cells each implemented as a logic circuit; and a plurality of filler cells including at least one first filler cell and at least one second filler cell that each include at least one pattern from among a back end of line (BEOL) pattern, a middle of line (MOL) pattern, and a front end of line (FEOL) pattern, and wherein the at least one first filler cell and the at least one second filler cell have a same size as each other, and a density of one of the at least one pattern of the at least one first filler cell is different from a density of one of the at least one pattern of the at least one second filler cell.

公开(公告)号：US20170194047A1

公开(公告)日：2017-07-06

申请号：US15361599

申请日：2016-11-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woojin RIM ,  Tae Joong SONG ,  Yong Ho KIM ,  Sung Hyun PARK

IPC: G11C11/419 ,  G06F1/28 ,  G06F1/04 ,  G11C11/418

CPC classification number: G11C11/419 ,  G06F1/3275 ,  G11C8/08 ,  G11C11/418 ,  Y02D10/14

Abstract: An integrated circuit (IC) and a mobile device are provided. The IC includes a memory cell that includes a word line, a bit line pair, and a storage cell connected to the word line and the bit line pair. The IC further includes a timing control circuit configured to generate switch signals based on an operation control signal, and a switch circuit configured to receive a first voltage, a second voltage and a third voltage having different levels, and output, to the word line, one among the first voltage, the second voltage, and the third voltage based on the switch signals.