CHARGER CIRCUIT INCLUDING A PLURALITY OF CHARGING PATHS
    1.
    发明申请
    CHARGER CIRCUIT INCLUDING A PLURALITY OF CHARGING PATHS 有权
    充电电路,包括充电电池的大量

    公开(公告)号:US20160087462A1

    公开(公告)日:2016-03-24

    申请号:US14856376

    申请日:2015-09-16

    CPC classification number: H02J7/0068 H02J7/0052 H02J7/007

    Abstract: A charger circuit includes a first path regulator, a path switch, and a second path regulator. The first path regulator is configured to generate a first regulation current based on an input voltage and an input current. The path switch is configured to pass or block a first charging current in response to a control signal. The first charging current is generated based on the first regulation current. The second path regulator is configured to generate a second regulation current based on the input voltage and the input current. At least one of the first charging current and a second charging current is used to charge a battery. The second charging current is generated based on the second regulation current. The second charging current is transferred to the battery without passing through the path switch.

    Abstract translation: 充电器电路包括第一路径调节器,路径开关和第二路径调节器。 第一路径调节器被配置为基于输入电压和输入电流产生第一调节电流。 路径开关被配置为响应于控制信号传递或阻止第一充电电流。 基于第一调节电流产生第一充电电流。 第二路径调节器被配置为基于输入电压和输入电流产生第二调节电流。 使用第一充电电流和第二充电电流中的至少一个为电池充电。 基于第二调节电流产生第二充电电流。 第二充电电流被传送到电池而不通过路径开关。

    SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20180205324A1

    公开(公告)日:2018-07-19

    申请号:US15802591

    申请日:2017-11-03

    Abstract: Provided are a semiconductor device and a method of operating the same. A semiconductor device may include a comparator which compares a first voltage with a rectified voltage and provides a second voltage in accordance with the comparison. A timer circuit may operate a timer according to the second voltage and output a third voltage in correspondence with an operation time of the timer. A driver may drive a transistor with a fourth voltage generated by the driver according to the third voltage. A calibration circuit may generate a timer calibration signal based on the second voltage and the fourth voltage. The timer calibration signal may be provided to the timer circuit and used to calibrate the operation time of the timer. More efficient rectification, with reduced occurrence of reverse current, may thereby be realized.

    BUCK-BOOST CONVERTER AND OPERATING METHOD
    4.
    发明申请
    BUCK-BOOST CONVERTER AND OPERATING METHOD 有权
    BUCK-BOOST转换器和操作方法

    公开(公告)号:US20150357916A1

    公开(公告)日:2015-12-10

    申请号:US14687935

    申请日:2015-04-16

    CPC classification number: H02M3/1582

    Abstract: A method of operating a buck-boost converter including an inductor and a capacitor includes; operating the buck-boost converter in boost mode until a level of an input voltage applied at an input node of the buck-boost converter reaches a desired level of an output voltage apparent at an output node of the buck-boost converter, and after the level of an input voltage reaches the desired level of the output voltage, operating the buck-boost converter in buck mode, wherein operating the buck-boost converter in buck mode and operating the buck-boost converter in boost mode overlap at least in part temporally proximate a point at which the level of the input voltage exceeds the level of the output voltage.

    Abstract translation: 一种操作包括电感器和电容器的降压 - 升压转换器的方法包括: 在升压模式下操作降压 - 升压转换器,直到在降压 - 升压转换器的输入节点处施加的输入电压的电平达到降压 - 升压转换器的输出节点处明显的输出电压的期望电平,并且在 输入电压的电平达到所需的输出电压水平,在降压模式下操作降压 - 升压转换器,其中以降压模式操作降压 - 升压转换器并以升压模式操作降压 - 升压转换器至少在一定时间内重叠 靠近输入电压电平超过输出电压电平的点。

    SIGNAL GENERATION CIRCUIT AND METHOD OF OPERATING THE SAME
    5.
    发明申请
    SIGNAL GENERATION CIRCUIT AND METHOD OF OPERATING THE SAME 有权
    信号发生电路及其操作方法

    公开(公告)号:US20130234682A1

    公开(公告)日:2013-09-12

    申请号:US13755190

    申请日:2013-01-31

    Inventor: GIL WON YOON YUS KO

    CPC classification number: G05F1/625 H02M1/36 H02M3/156 H03K5/15013 H03K7/08

    Abstract: A signal generation circuit includes: a clock signal generator configured to generate a clock signal and to change a frequency of the clock signal in response to a select signal; a transmission control circuit configured to control transmission of the clock signal based on the select signal; and a counter configured to perform an operation among a count operation and a count stop operation based on an output signal of the transmission control circuit and to output the select signal based on a result of performing the operation. When the counter performs the count operation in response to the clock signal output from the transmission control circuit, the counter outputs a most significant bit (MSB) among its count bits as the select signal.

    Abstract translation: 信号发生电路包括:时钟信号发生器,被配置为响应于选择信号产生时钟信号并改变时钟信号的频率; 发送控制电路,被配置为基于所述选择信号来控制所述时钟信号的发送; 以及计数器,被配置为基于传输控制电路的输出信号在计数操作和计数停止操作之间执行操作,并且基于执行操作的结果来输出选择信号。 当计数器响应于从传输控制电路输出的时钟信号执行计数操作时,计数器输出其计数位之中的最高有效位(MSB)作为选择信号。

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