公开(公告)号：US20220216296A1

公开(公告)日：2022-07-07

申请号：US17376458

申请日：2021-07-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gabjin NAM ,  Youngbin LEE ,  Cheoljin CHO ,  Jaehyoung CHOI

IPC: H01L49/02 ,  H01L27/11507

Abstract: Provided is a method of fabricating a capacitor. The method of fabricating a capacitor may include forming a first electrode, forming a dielectric layer on the first electrode, forming a second electrode on the dielectric layer, and applying, between the first electrode and the second electrode, a voltage outside an operating voltage range applied during operation or a current outside an operating current range applied during operation.

公开(公告)号：US20230088490A1

公开(公告)日：2023-03-23

申请号：US18071054

申请日：2022-11-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngbin LEE ,  Kiho KIM ,  Jinhoon JANG ,  Yeonkyu CHOI

IPC: G11C7/10 ,  G11C7/14

Abstract: Provided are an apparatus, a memory device, and a method for storing a plurality of parameter codes for an operation parameter. The memory device includes a mode register and a control logic circuit. To set a first operating condition and a second operating condition for one operation parameter, the mode register stores a first parameter code for the operation parameter and a second parameter code, which is expressed as an offset value from the first parameter code. The control logic circuit sets the first operating condition as a current operating condition of the memory device by using the first parameter code based on a first control code and sets the second operating condition as the current operating condition of the memory device by using the first parameter code and the second parameter code based on a second control code.

公开(公告)号：US20220148631A1

公开(公告)日：2022-05-12

申请号：US17466754

申请日：2021-09-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Youngbin LEE ,  Kiho KIM ,  Jinhoon JANG ,  Yeonkyu CHOI

IPC: G11C7/10 ,  G11C7/14

Abstract: Provided are an apparatus, a memory device, and a method for storing a plurality of parameter codes for an operation parameter. The memory device includes a mode register and a control logic circuit. To set a first operating condition and a second operating condition for one operation parameter, the mode register stores a first parameter code for the operation parameter and a second parameter code, which is expressed as an offset value from the first parameter code. The control logic circuit sets the first operating condition as a current operating condition of the memory device by using the first parameter code based on a first control code and sets the second operating condition as the current operating condition of the memory device by using the first parameter code and the second parameter code based on a second control code.