公开(公告)号：US20250119668A1

公开(公告)日：2025-04-10

申请号：US18900069

申请日：2024-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younghyun YOON

IPC: H04N25/78

Abstract: A ramp signal generator includes a resistor connected between an output node outputting a ramp signal that increases or decreases at a constant slope and a first power node which receives a first power voltage, and plural current cells. A cell current flows through each of the current cells to the first power node or the resistor. The current cells include a first current cell. The first current cell includes a first transistor connected between a first switching node and the output node, the cell current flowing to the resistor through the first transistor, a second transistor connected between the first switching node and the first power node, the cell current flowing to the first power node through the second transistor, and a negative feedback circuit that maintains a constant voltage at the first switching node.

公开(公告)号：US20240163582A1

公开(公告)日：2024-05-16

申请号：US18213032

申请日：2023-06-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younghyun YOON ,  Haneul JUNG ,  Dongjae HAN

IPC: H04N25/767 ,  H04N25/616 ,  H04N25/772

CPC classification number: H04N25/767 ,  H04N25/616 ,  H04N25/772

Abstract: A ramp signal generating device and an image sensor for decreasing the latency of a ramp signal are provided. The ramp signal generating device may include a first circuit configured to detect a capacitance of a parasitic capacitor, a second circuit configured to charge the parasitic capacitor with a first voltage, and a third circuit configured to receive the capacitance as an input to generate a load current causing the ramp signal with a predetermined slope.

公开(公告)号：US20240147089A1

公开(公告)日：2024-05-02

申请号：US18325507

申请日：2023-05-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongsuk CHOI ,  Younghyun YOON ,  Haneul JUNG ,  Dongjae HAN

IPC: H04N25/60 ,  H04N25/772

CPC classification number: H04N25/60 ,  H04N25/772

Abstract: An image sensor includes a pixel array connected to a plurality of column lines, a first ramp signal generator generating a first ramp signal, a second ramp signal generator generating a second ramp signal, and an analog-to-digital conversion (ADC) circuit operating in a first mode. The ADC circuit includes a first comparator group comparing the first ramp signal with a first pixel signal received from a first column line group, among the plurality of column lines, and a second comparator group comparing the second ramp signal with a second pixel signal received from a second column line group, among the plurality of column lines. The comparing of the first ramp signal occurs at a comparison time point different from a comparison time point during which the comparing of the second ramp signal occurs.