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公开(公告)号:US12133008B2
公开(公告)日:2024-10-29
申请号:US17798460
申请日:2021-01-26
发明人: Satoshi Azuhata
IPC分类号: H04N25/75 , H04N25/768 , H04N25/772 , H04N25/778 , H04N25/79
CPC分类号: H04N25/75 , H04N25/768 , H04N25/772 , H04N25/778 , H04N25/79
摘要: To improve a frame rate in a solid-state imaging element that compares a reference signal and a pixel signal.
The solid-state imaging element includes a differential amplifier circuit, a transfer transistor, and a source follower circuit. The differential amplifier circuit amplifies a difference between the potentials of a pair of input nodes and outputs the difference from an output node. The transfer transistor transfers charge from a photoelectric conversion element to a floating diffusion layer. The auto-zero transistor short-circuits the floating diffusion layer and the output node in a predetermined period. The source follower circuit supplies a potential to one of the pair of input nodes according to a potential of the floating diffusion layer.-
2.
公开(公告)号:US12114091B2
公开(公告)日:2024-10-08
申请号:US18002798
申请日:2021-06-24
发明人: Yingyun Zha , Roger Mark Bostock , Jian Deng , Yu Zou
IPC分类号: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
CPC分类号: H04N25/771 , G06F7/02 , H03M1/12 , H04N25/40 , H04N25/47 , H04N25/703 , H04N25/766 , H04N25/772 , H04N25/78 , H04N25/79
摘要: A delta image sensor comprising a plurality of acquisition circuits corresponding to at least one pixel. Each acquisition circuit includes at least one sensor circuit comprising a photosensor to generate a sensor signal, VSIG, depending on a light signal illuminating the photosensor; at least one single slope analogue to digital conversion, A/D, circuit configured to convert a current VSIG to a digital signal, wherein the A/D circuit (12) is configured to use one of a plurality of ramps for the conversion; at least one digital storage circuit configured to store a representation of at least one digital signal corresponding to a previous VSIG; at least one digital comparison circuit configured to compare the level of the stored representation with the current VSIG to detect whether a changed level is present; and at least one digital output circuit configured to generate an event output, in response to the changed level.
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公开(公告)号:US12108171B2
公开(公告)日:2024-10-01
申请号:US17684159
申请日:2022-03-01
发明人: Masayuki Ooki
IPC分类号: H04N25/40 , H04N25/75 , H04N25/772
CPC分类号: H04N25/40 , H04N25/75 , H04N25/772
摘要: According to one embodiment, a solid-state imaging unit includes a plurality of pixels arranged along a first direction. The pixels each include a photoelectric conversion unit and a filter on the photoelectric conversion unit. The filer has a planar shape corresponding to a planar shape of the photoelectric conversion unit. The filter has a width in the first direction is different from a width of the filter in a second direction orthogonal to the first direction.
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公开(公告)号:US20240323569A1
公开(公告)日:2024-09-26
申请号:US18495020
申请日:2023-10-26
发明人: Ho Yong NA , Kyung-Min KIM , Young Tae JANG
IPC分类号: H04N25/772 , H04N25/78
CPC分类号: H04N25/772 , H04N25/78
摘要: An image sensor includes a pixel having first and second photodiodes, a storage capacitor, an overflow transistor, and a read circuit. The pixel is configured to output a first sub-output signal obtained by converting electric charge generated by the first photodiode during an exposure period with first conversion gain, output a second sub-output signal obtained by converting the electric charge generated by the first photodiode during the exposure period with second conversion gain, output a first reset signal corresponding to the first sub-output signal and a second reset signal corresponding to the second sub-output signal, output a third sub-output signal, which is obtained by converting a portion of electric charge generated by the second photodiode during the exposure period with third conversion gain, output a fourth sub-output signal, obtained by converting the electric charge generated by the second photodiode and stored in the storage capacitor during the exposure period, with fourth conversion gain, and output a third reset signal corresponding to the third sub-output signal and a fourth reset signal corresponding to the fourth sub-output signal.
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公开(公告)号:US20240314468A1
公开(公告)日:2024-09-19
申请号:US18398150
申请日:2023-12-28
发明人: Dongchen WANG , Wenlong LIN , Yaowu MO
IPC分类号: H04N25/772 , H04N25/76 , H04N25/771 , H04N25/78
CPC分类号: H04N25/772 , H04N25/771 , H04N25/7795 , H04N25/78
摘要: A counter, an analog-to-digital converter, and a method for reading out image signals; the counter comprises N cascaded counting units, each of which comprises a writable D flip-flop, which has a clock input, a data input, a Q output, a Q-bar output, a control input, and a write input; the clock input of the writable D flip-flop of each counting unit is connected to the Q-bar or Q output of the writable D flip-flop of a previous counting unit, except that the clock input of the writable D flip-flop of a first counting unit of the N cascaded counting units receives a clock signal; the Q-bar output of each writable D flip-flop is connected to the data input of the same writable D flip-flop, each Q output generates a counting result, each control input receives a control signal, and each write input receives a write signal.
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公开(公告)号:US20240314467A1
公开(公告)日:2024-09-19
申请号:US18259334
申请日:2021-12-06
发明人: KEISHI KUMATA
IPC分类号: H04N25/772 , H04N23/56 , H04N23/667 , H04N25/705 , H04N25/76 , H04N25/767 , H04N25/779 , H04N25/78
CPC分类号: H04N25/772 , H04N23/56 , H04N23/667 , H04N25/705 , H04N25/779 , H04N25/7795 , H04N25/78 , H04N25/767
摘要: Provided is an imaging device capable of suppressing a decrease in a frame rate while improving charge transfer efficiency. An imaging device according to an embodiment of the present disclosure includes: a photoelectric conversion element; a signal converter that is boosted when charge transferred from the photoelectric conversion element is converted into a pixel signal; a selection transistor that interrupts a signal line of the pixel signal during a boosting period of the signal converter; a comparator including a non-inverting input terminal to which the pixel signal is input via the selection transistor, an inverting input terminal to which a ramp signal is input, and an output terminal which outputs a comparison result between the pixel signal and the ramp signal; and a correction circuit that holds a potential of the non-inverting input terminal in the boosting period at a potential of the non-inverting input terminal before the boosting period.
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公开(公告)号:US12085410B2
公开(公告)日:2024-09-10
申请号:US17611970
申请日:2020-04-27
发明人: Sozo Yokogawa , Yusuke Moriyama , Nobuhiro Kawai , Yuhi Yorikado , Fumihiko Koga , Yoshiki Ebiko , Suzunori Endo , Hayato Wakabayashi
IPC分类号: G01C3/06 , H04N25/705 , H04N25/772 , H04N25/778
CPC分类号: G01C3/06 , H04N25/705 , H04N25/772 , H04N25/778
摘要: A distance measurement accuracy is improved. A solid-state imaging device according to an embodiment includes a pixel array part in which a plurality of pixels is arranged in a matrix, in which each of the pixels includes a plurality of photoelectric conversion units that each photoelectrically converts incident light to generate a charge, a floating diffusion region that accumulates the charge, a plurality of transfer circuits that transfer the charge generated in each of the plurality of photoelectric conversion units to the floating diffusion region, and a first transistor that causes a pixel signal of a voltage value corresponding to a charge amount of the charge accumulated in the floating diffusion region to appear in a signal line.
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8.
公开(公告)号:US20240298088A1
公开(公告)日:2024-09-05
申请号:US18177668
申请日:2023-03-02
发明人: Wenlei Yang , Shoushun Chen , Andreas Suess
IPC分类号: H04N23/60 , H04N25/707 , H04N25/772
CPC分类号: H04N23/665 , H04N25/707 , H04N25/772
摘要: Methods for transmitting asynchronous event data via synchronous communications interfaces (and associated imaging systems) are disclosed herein. In one embodiment, an imager comprises an array of event vision pixels, a synchronous communications transmitter configured to transmit frames of data to a synchronous communications receiver, and a timer configured to indicate when a threshold amount of time has elapsed. The pixels can generate event data based on activity within an external scene. The imager can be configured to insert available event data into a payload of the current frame during a first time period before the frame timer indicates that the threshold amount of time has elapsed, pad the payload with dummy data during a second time period after the frame timer indicates that the threshold amount of time has elapsed, and transmit (using the synchronous communications transmitter) the current frame of data to the synchronous communications receiver.
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公开(公告)号:US12081890B2
公开(公告)日:2024-09-03
申请号:US17907809
申请日:2021-03-12
发明人: Junichiro Kusuda
IPC分类号: H04N25/772 , H03F3/45 , H03M1/38 , H04N25/78
CPC分类号: H04N25/772 , H03F3/45269 , H03M1/38 , H04N25/78 , H03F2200/129 , H03F2200/135
摘要: An imaging device of the present disclosure includes: a plurality of pixel circuits that each generates a pixel signal including a pixel voltage corresponding to an amount of received light, and performs AD conversion by comparing the pixel signal with a reference signal; and a reference signal generator including a signal generation circuit and a voltage follower circuit, the signal generation circuit that generates a voltage signal having a ramp waveform, and the voltage follower circuit that performs a voltage follower operation on the basis of the voltage signal to generate the reference signal, and supplies the reference signal to the plurality of pixel circuits.
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公开(公告)号:US12047685B2
公开(公告)日:2024-07-23
申请号:US17906981
申请日:2021-02-03
发明人: Kazutoshi Kodama
IPC分类号: H04N23/73 , H04N25/772
CPC分类号: H04N23/73 , H04N25/772
摘要: To improve the frame rate in an imaging apparatus that carries out still image recording and moving image display simultaneously. A pixel array includes an arrangement of a plurality of pixels. The plurality of pixels each include an internal memory. An exposure control unit carries out first exposure control in which captured data obtained by performing exposure to all the plurality of pixels together is retained in the internal memories of the pixels. The exposure control unit also carries out second exposure control in which captured data obtained by performing exposure to specific pixels of the plurality of pixels together is retained in the internal memories of the pixels.
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