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1.发明申请公开(公告)号：US20210263870A1
公开(公告)日：2021-08-26
申请号：US17143539
申请日：2021-01-07
发明人： Seung Wook LEE , Jung Ho AHN , Hweesoo KIM
摘要： An accelerator, an operation method of the accelerator, and an accelerator apparatus including the accelerator are disclosed. The operation method includes receiving one or more workloads assigned by a main processor, performing at least one operation involved with the workloads in an internal memory of the accelerator or in a direct memory access (DMA) configured to control data input to or output from the internal memory, and providing a result of performing the at least one operation.
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公开(公告)号：US20220365891A1
公开(公告)日：2022-11-17
申请号：US17876116
申请日：2022-07-28
发明人： Seung Wook LEE , Hweesoo KIM , Jung Ho AHN
摘要： An accelerator includes: a memory configured to store input data; a plurality of shift buffers each configured to shift input data received sequentially from the memory in each cycle, and in response to input data being stored in each of internal elements of the shift buffer, output the stored input data to a processing element (PE) array; a plurality of backup buffers each configured to store input data received sequentially from the memory and transfer the stored input data to one of the shift buffers; and the PE array configured to perform an operation on input data received from one or more of the shift buffers and on a corresponding kernel.
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公开(公告)号：US20220114116A1
公开(公告)日：2022-04-14
申请号：US17192032
申请日：2021-03-04
发明人： Seung Wook LEE , Hweesoo KIM , Jung Ho AHN
摘要： An accelerator includes: a memory configured to store input data; a plurality of shift buffers each configured to shift input data received sequentially from the memory in each cycle, and in response to input data being stored in each of internal elements of the shift buffer, output the stored input data to a processing element (PE) array; a plurality of backup buffers each configured to store input data received sequentially from the memory and transfer the stored input data to one of the shift buffers; and the PE array configured to perform an operation on input data received from one or more of the shift buffers and on a corresponding kernel.
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