公开(公告)号：US20210027827A1

公开(公告)日：2021-01-28

申请号：US16822164

申请日：2020-03-18

Applicant: SAMSUNG ELECTRONICS co., LTD.

Inventor： HWAPYONG KIM ,  HUNDAE CHOI ,  JUNHA LEE

IPC: G11C11/408 ,  G11C11/4096 ,  G11C7/10 ,  H03K19/00

Abstract: A memory device includes a calibration circuit having a pull-up code generator including a pull-up resistor block and generating a pull-up code, and a pull-down code generator including a replica pull-up resistor block and a pull-down resistor block and generating a pull-down code, and an off chip driver/on die termination circuit providing a termination resistance having a resistance value set by the calibration circuit in a data reception operation and outputting data at an output strength set by the calibration circuit in a data output operation. In a calibration operation, a resistance value of the replica pull-up resistor block is adjusted to be less than a resistance value of the pull-up resistor block, and the pull-down code has a code value by which a resistance value of the pull-down resistor block corresponds to the resistance value of the replica pull-up resistor block.