公开(公告)号：US20200013469A1

公开(公告)日：2020-01-09

申请号：US16252300

申请日：2019-01-18

Applicant: SanDisk Technologies LLC

Inventor： Jayavel Pachamuthu ,  Amul Dhirajbhai Desai ,  Ankitkumar Babariya

IPC: G11C16/16 ,  G11C16/04

Abstract: Strings of non-volatile memory cells include one or more joint regions adjacent to dummy non-volatile memory cells. During erase operations, different voltage levels are used for different dummy word lines coupled to respective dummy non-volatile memory cells. For example, a selection circuit may set a voltage level of a particular dummy word line to a voltage level greater than a different dummy word line. In another example, the selection circuit may determine a voltage level for a given dummy word line based on a distance between a non-volatile memory cell coupled to the given dummy word line and a selection device included in a string of non-volatile memory cells. Electron holes generated using the dummy word lines during erase operations may neutralize undesired trapped charges in a non-volatile memory string, thereby reducing disparity in erase times for different strings in the non-volatile memory circuit.

公开(公告)号：US11037631B2

公开(公告)日：2021-06-15

申请号：US16252300

申请日：2019-01-18

Applicant: SanDisk Technologies LLC

Inventor： Jayavel Pachamuthu ,  Amul Dhirajbhai Desai ,  Ankitkumar Babariya

IPC: G11C16/04 ,  G11C16/16 ,  G11C16/34

Abstract: Strings of non-volatile memory cells include one or more joint regions adjacent to dummy non-volatile memory cells. During erase operations, different voltage levels are used for different dummy word lines coupled to respective dummy non-volatile memory cells. For example, a selection circuit may set a voltage level of a particular dummy word line to a voltage level greater than a different dummy word line. In another example, the selection circuit may determine a voltage level for a given dummy word line based on a distance between a non-volatile memory cell coupled to the given dummy word line and a selection device included in a string of non-volatile memory cells. Electron holes generated using the dummy word lines during erase operations may neutralize undesired trapped charges in a non-volatile memory string, thereby reducing disparity in erase times for different strings in the non-volatile memory circuit.

公开(公告)号：US10276251B1

公开(公告)日：2019-04-30

申请号：US15851139

申请日：2017-12-21

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Sukhminder Singh Lobana ,  Kirubakaran Periyannan ,  Ankitkumar Babariya

IPC: G11C7/00 ,  G11C29/00 ,  G11C16/34 ,  G11C29/12

Abstract: A memory system performs verification when writing to memory. It is possible that the memory system may be missing some components (or components may be otherwise unavailable). To account for missing or unavailable components when performing verification, the memory system uses a pattern of data that includes a mask identifying the missing or unavailable components. The mask is used to force a predetermined result of the verification for the missing or unavailable portions of the memory structure so that results of the verification that correspond to the missing or unavailable components are not counted as errors.