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公开(公告)号:US12150300B2
公开(公告)日:2024-11-19
申请号:US17806390
申请日:2022-06-10
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Yusuke Tanaka , Haruki Suwa
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers containing a terrace region having a plurality of steps, memory stack structures extending through the alternating stack, a retro-stepped dielectric material portion overlying the terrace region, first laterally isolated contact structures including a respective first contact via structure and a respective first dielectric spacer, and second laterally isolated contact structures including a respective second contact via structure and a respective second dielectric spacer. The respective first contact via structure contacts a top surface of a respective first electrically conductive layer in the respective step of the plurality of steps. The respective second contact via structure extends through the respective first electrically conductive layer in the respective step and contacts a top surface of a respective second electrically conductive layer which underlies the first electrically conductive layer in the respective step.
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公开(公告)号:US11410924B2
公开(公告)日:2022-08-09
申请号:US16999388
申请日:2020-08-21
Applicant: SANDISK TECHNOLOGIES LLC
Inventor: Haruki Suwa , Keisuke Shigemura , Akihiro Shimada
IPC: H01L21/00 , H01L23/522 , H01L27/11582 , H01L27/11519 , H01L27/1157 , H01L27/11556 , H01L27/11565 , H01L27/11524
Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers containing steps, memory stack structures extending through the alternating stack, a first contact via structure which contacts a top surface of a respective upper electrically conductive layer in a first step, a first dielectric spacer which does not contact any of the electrically conductive layers other than the respective upper electrically conductive layer in the first step, a second contact via structure which contacts a top surface of a respective lower electrically conductive layer in the first step, and a second dielectric spacer which extends through the respective upper electrically conductive layer, and which contacts the respective lower electrically conductive layer.
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