公开(公告)号：US09484086B2

公开(公告)日：2016-11-01

申请号：US14328027

申请日：2014-07-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Sagar Magia ,  Jagdish M. Sabde

IPC: G11C11/56 ,  G11C29/00 ,  G11C16/04 ,  G11C29/02 ,  G11C29/06 ,  G11C29/12

CPC classification number: G11C11/5628 ,  G11C16/0483 ,  G11C29/025 ,  G11C29/06 ,  G11C2029/1202

Abstract: A number of techniques determine defects in non-volatile memory arrays, which are particularly applicable to 3D NAND memory, such as BiCS type. Word line to word line shorts within a memory block are determined by application of an AC stress mode, followed by a defect detection operation. An inter-block stress and detection operation can be used to determine word line to word line leaks between different blocks. Select gate leak line leakage, for both the word lines and other select lines, is considered, as are shorts from word lines and select lines to local source lines. In addition to word line and select line defects, techniques determine shorts between bit lines and low voltage circuitry, such as in sense amplifiers.

Abstract translation: 许多技术确定非易失性存储器阵列中的缺陷，其特别适用于3D NAND存储器，例如BiCS型。 通过应用AC应力模式来确定存储器块内的字线与字线短路，然后进行缺陷检测操作。 可以使用块间应力和检测操作来确定不同块之间的字线到字线泄漏。 对于字线和其他选择线都选择栅极泄漏线泄漏，也被认为是字线的短路，并选择线到本地源极线。 除了字线和选择线缺陷之外，技术还可以确定位线和低电压电路之间的短路，例如读出放大器。