公开(公告)号：US20210210504A1

公开(公告)日：2021-07-08

申请号：US16735854

申请日：2020-01-07

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yoshitaka OTSU ,  Kenichi OKABE ,  Takashi ARAI

IPC: H01L27/11582 ,  H01L23/522 ,  H01L21/768

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory stack structures vertically extending through the alternating stack, a perforated dielectric moat structure vertically extending through the alternating stack, and an interconnection via structure laterally surrounded by the perforated dielectric moat structure and vertically extending through each insulating layer within the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel and a vertical stack of memory elements located at levels of the electrically conductive layers. The perforated dielectric moat structure includes a plurality of lateral openings at each level of the insulating layers, and does not include any opening at levels of the electrically conductive layers.