公开(公告)号：US20190267461A1

公开(公告)日：2019-08-29

申请号：US15906109

申请日：2018-02-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Shinsuke YADA ,  Xiaolong HU ,  Junichi ARIYOSHI

IPC: H01L29/423 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11519 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11573 ,  H01L27/11565 ,  H01L21/28

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate. An insulating fill material layer and drain select gate electrodes are located over the alternating stack. A group of memory stack structures extends through the alternating stack, and is arranged as rows of memory stack structures. Each memory stack structure is entirely encircled laterally by a respective one of the drain select gate electrodes. The insulating fill material layer includes a drain select level isolation structure extending between neighboring rows of memory stack structures and including a pair of sidewalls containing a respective laterally alternating sequence of planar vertical sidewall portions and concave vertical sidewall portions, and a drain select level field portion adjoined to the drain select level isolation portion.