公开(公告)号：US20230335605A1

公开(公告)日：2023-10-19

申请号：US18129122

申请日：2023-03-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koji KUSUNOKI ,  Susumu KAWASHIMA ,  Hideaki SHISHIDO ,  Tomoaki ATSUMI ,  Motoharu SAITO

IPC: H01L29/417 ,  H01L29/786 ,  H01L27/088

CPC classification number: H01L29/41733 ,  H01L29/7869 ,  H01L27/088 ,  H01L29/78696

Abstract: A novel semiconductor device is provided. The semiconductor device is a single-polarity semiconductor device including a vertical-channel transistor. In the vertical-channel transistor, the higher parasitic capacitance value of the gate-source parasitic capacitance and the gate-drain parasitic capacitance is used as a bootstrap capacitor, which decreases the occupied area of the semiconductor device. The use of an oxide semiconductor for a semiconductor layer of the vertical-channel transistor increases the breakdown voltage between the source and the drain, which can shorten the channel length. In addition, stable operation can be performed even in a high-temperature environment.

公开(公告)号：US20230152926A1

公开(公告)日：2023-05-18

申请号：US17919659

申请日：2021-04-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Satoshi YOSHIMOTO ,  Kazunori WATANABE ,  Susumu KAWASHIMA ,  Ryo YAMAUCHI ,  Motoharu SAITO ,  Koji KUSUNOKI ,  Shunpei YAMAZAKI

IPC: G06F3/042 ,  G09G3/3233 ,  G06T7/20

CPC classification number: G06F3/042 ,  G09G3/3233 ,  G06T7/20 ,  G09G2310/08 ,  G09G2300/08 ,  G09G2330/023 ,  G06T2207/20081

Abstract: A display apparatus capable of performing authentication in a short time is provided. The display apparatus includes a first display portion where first pixels are arranged in a matrix, a second display portion where second pixels are arranged in a matrix, first and second row driver circuits, and a control circuit. Each of the first and the second pixels includes a light-receiving element. The first and the second pixels each have a function of acquiring imaging data by using the light-receiving element. The first and the second row driver circuits each have a function of selecting the first and the second pixels which read out the imaging data. The control circuit has a function of sequentially driving the first and the second row driver circuits in a first mode, and has a function of driving one of the first and the second row driver circuits on the basis of the imaging data in the second mode. Each of the scan rates of the first and the second row driver circuits in the first mode is higher than the scan rate of the first or the second row driver circuit in the second mode.

公开(公告)号：US20240379690A1

公开(公告)日：2024-11-14

申请号：US18767164

申请日：2024-07-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Satoshi YOSHIMOTO ,  Koji KUSUNOKI ,  Kazunori WATANABE ,  Susumu KAWASHIMA ,  Marina HIYAMA ,  Motoharu SAITO

IPC: H01L27/12 ,  G09G3/20

Abstract: A highly functional semiconductor device is provided. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first semiconductor layer, a first gate electrode, a first electrode, and a second electrode. The second transistor includes a second semiconductor layer, a second gate electrode, a third electrode, and a fourth electrode. The first gate electrode and the second gate electrode are connected to each other, and the second electrode and the third electrode are connected to each other. A first insulating layer, a second insulating layer, and a second semiconductor layer are stacked over the first semiconductor layer. The first insulating layer is less likely to diffuse hydrogen than the second insulating layer. The second insulating layer contains oxide, the first semiconductor layer contains polycrystalline silicon, and the second semiconductor layer contains a metal oxide. The first transistor is a p-channel transistor and the second transistor is an n-channel transistor.

公开(公告)号：US20230369344A1

公开(公告)日：2023-11-16

申请号：US18140797

申请日：2023-04-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koji KUSUNOKI ,  Susumu KAWASHIMA ,  Hideaki SHISHIDO ,  Tomoaki ATSUMI ,  Motoharu SAITO

IPC: H01L27/12 ,  G09G3/3233

CPC classification number: H01L27/1237 ,  G09G3/3233 ,  G09G2300/0842 ,  G09G2310/08

Abstract: A semiconductor device including a first transistor, a second transistor, and an insulating layer is provided. The first transistor includes a first semiconductor layer and a first conductive layer. The second transistor includes a second semiconductor layer and a second conductive layer. The insulating layer includes a first side surface over the first conductive layer and a second side surface over the second conductive layer. A gate insulating layer includes a portion facing the first side surface with the first semiconductor layer therebetween and a portion facing the second side surface with the second semiconductor layer therebetween. A gate electrode includes a portion facing the first side surface with the gate insulating layer and the first semiconductor layer therebetween and a portion facing the second side surface with the gate insulating layer and the second semiconductor layer therebetween. The first semiconductor layer is electrically connected to the second semiconductor layer.

公开(公告)号：US20230326934A1

公开(公告)日：2023-10-12

申请号：US18022329

申请日：2021-08-17

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Satoshi YOSHIMOTO ,  Koji KUSUNOKI ,  Kazunori WATANABE ,  Susumu KAWASHIMA ,  Marina HIYAMA ,  Motoharu SAITO

IPC: H01L27/12 ,  G09G3/20

CPC classification number: H01L27/1248 ,  G09G3/20 ,  G09G2310/0291 ,  G09G2330/021 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2300/0426

Abstract: A highly functional semiconductor device is provided. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first semiconductor layer, a first gate electrode, a first electrode, and a second electrode. The second transistor includes a second semiconductor layer, a second gate electrode, a third electrode, and a fourth electrode. The first gate electrode and the second gate electrode are connected to each other, and the second electrode and the third electrode are connected to each other. A first insulating layer, a second insulating layer, and a second semiconductor layer are stacked over the first semiconductor layer. The first insulating layer is less likely to diffuse hydrogen than the second insulating layer. The second insulating layer contains oxide, the first semiconductor layer contains polycrystalline silicon, and the second semiconductor layer contains a metal oxide. The first transistor is a p-channel transistor and the second transistor is an n-channel transistor.

公开(公告)号：US20230260475A1

公开(公告)日：2023-08-17

申请号：US18134054

申请日：2023-04-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Motoharu SAITO

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2330/021

Abstract: A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.

公开(公告)号：US20240188330A1

公开(公告)日：2024-06-06

申请号：US18517122

申请日：2023-11-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Koji KUSUNOKI ,  Hideaki SHISHIDO ,  Susumu KAWASHIMA ,  Motoharu SAITO ,  Tomoaki ATSUMI

IPC: H10K59/121 ,  G09G3/3233 ,  H10K59/124

CPC classification number: H10K59/1213 ,  G09G3/3233 ,  H10K59/124 ,  G09G2300/0465 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/08 ,  G09G2330/021

Abstract: A novel semiconductor device is provided. A gate of a second transistor is electrically connected to one of a source and a drain of a first transistor and one of a source and a drain of a third transistor. Aback gate of the second transistor is electrically connected to one of a source and a drain of a fourth transistor and one terminal of a first capacitor. One of a source and a drain of the second transistor is electrically connected to the other of the source and the drain of the third transistor, the other terminal of the first capacitor, and one terminal of a light-emitting element. A semiconductor layer in each of the first, third, and fourth transistors is partly in an opening formed in an insulating layer.

公开(公告)号：US20230412935A1

公开(公告)日：2023-12-21

申请号：US18251576

申请日：2021-10-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kazunori WATANABE ,  Satoshi YOSHIMOTO ,  Koji KUSUNOKI ,  Susumu KAWASHIMA ,  Motoharu SAITO

IPC: H04N25/44 ,  H04N25/713 ,  G06V40/13

CPC classification number: H04N25/44 ,  H04N25/713 ,  G06V40/1318

Abstract: A semiconductor device capable of performing authentication in a short time can be provided. The semiconductor device includes a light-emitting unit and an imaging unit. The imaging unit includes a row driver circuit, and the row driver circuit includes first to m latch circuits (m is an integer greater than or equal to 2) and first to m register circuits. A first start pulse signal is input to a first latch circuit and second start pulse signals are input to first to m latch circuits. Scan signals output from the first to (m−1)-th register circuits are input to the second to m-th latch circuits, respectively. The first latch circuit has a function of outputting one of the first start pulse signal and the second start pulse signal to the first register circuit on the basis of data held, and the second to m-th latch circuits have a function of outputting one of the scan signal and the second start pulse signal to the second to m-th register circuits on the basis of data held.

公开(公告)号：US20210319764A1

公开(公告)日：2021-10-14

申请号：US17285603

申请日：2019-10-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei TOYOTAKA ,  Motoharu SAITO

IPC: G09G3/36

Abstract: A display apparatus which includes a driver with low power consumption and in which an output voltage of the driver is boosted by a pixel is provided. The source driver in which a logic unit and an amplifier unit operate appropriately by the same low voltage is included, and the pixel has a function of retaining first data, a function of adding second data to the first data to generate third data, and a function of supplying the third data to a display device. Thus, even when a voltage output from the source driver is low, the voltage can be boosted by the pixel; accordingly, the display device can operate appropriately.