COMMON-MODE VOLTAGE SUPPRESSION METHOD AND SYSTEM FOR QUASI-Z-SOURCE SIMPLIFIED THREE-LEVEL INVERTER

    公开(公告)号:US20240348152A1

    公开(公告)日:2024-10-17

    申请号:US18280336

    申请日:2022-12-28

    摘要: A common-mode voltage suppression method includes: selecting two large and two small vectors with low common-mode voltage magnitudes as basic voltage vectors; writing a volt-second balance equation according to a selected basic voltage vectors, and calculating, an introduced distribution factor of duty cycles of small vectors, initial values of distribution factors of a duty cycle of each basic voltage vector and of small vectors; designing a neutral-point voltage balance controller to obtain and utilize a corrected value of the distribution factor of the duty cycles of the small vectors and the initial values and combine with a set neutral-point voltage balance control threshold to update the duty cycle of each basic voltage vector; and inserting shoot-through states into the small vectors, designing a switching sequence, converting the sequence into a driving signal of a power switch, and controlling an operation of the quasi-Z-source simplified three-level inverter.