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公开(公告)号:US20190198411A1
公开(公告)日:2019-06-27
申请号:US16214284
申请日:2018-12-10
Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Inventor: Yasuyoshi HORIKAWA , Yoshihiro IHARA , Yoshihiro KITA , Hikaru TANAKA
IPC: H01L23/31 , H01L23/498 , H01L23/538 , H01L25/16 , H05K1/14
CPC classification number: H01L23/3114 , H01L23/49827 , H01L23/5387 , H01L25/16 , H05K1/144
Abstract: A semiconductor device includes a flexible wiring substrate. The wiring substrate includes at least two mounting portions and at least one connecting portion. The mounting portions are stacked spaced apart from each other. Each connecting portion is bent to connect two mounting portions that are adjacent in a stacking direction. The semiconductor device further includes at least one semiconductor chip mounted on at least one of the at least two mounting portions and a plurality of conductive connecting members connecting the mounting portions to each other in the stacking direction.
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公开(公告)号:US20190371717A1
公开(公告)日:2019-12-05
申请号:US16418168
申请日:2019-05-21
Applicant: SHINKO ELECTRIC INDUSTRIES CO., LTD.
Inventor: Yoshihiro KITA , Hitoshi KONDO
IPC: H01L23/498 , H05K1/02 , H05K1/09 , H01L21/48
Abstract: An interconnect substrate includes an insulating layer having a first resin layer and a second resin layer covering an upper surface of the first resin layer, a first conductive layer having an upper surface and side surfaces covered with the first resin layer, a lower surface of the first conductive layer being exposed from a lower surface of the first resin layer, and a second conductive layer including an interconnect pattern and a via interconnect, the interconnect pattern being disposed on an upper surface of the second resin layer, the via interconnect penetrating through both the second resin layer and the first resin layer to connect the interconnect pattern to the upper surface of the first conductive layer, wherein the first resin layer is made of a resin having a higher modulus of elasticity and a lower coefficient of elongation than the second resin layer.
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