CLOCK SIGNAL TIMING-BASED NOISE SUPPRESSION
    1.
    发明申请
    CLOCK SIGNAL TIMING-BASED NOISE SUPPRESSION 有权
    基于时钟信号时序噪声抑制

    公开(公告)号:US20140266336A1

    公开(公告)日:2014-09-18

    申请号:US13832708

    申请日:2013-03-15

    CPC classification number: H03L7/0816 H03L7/0814

    Abstract: A method includes generating one of a first clock signal and a second clock signal from the other clock signal. The first clock signal is configured to be used to synchronize an operation of an analog system, and the second clock signal is configured to be used to synchronize an operation of a digital system. The method includes using a phase detector of the analog system to measure a timing of the first clock signal relative to the second clock signal; and the method includes controlling a delay element of the digital system to regulate the timing based on the measurement by the phase detector to suppress noise in the analog system.

    Abstract translation: 一种方法包括从另一个时钟信号产生第一时钟信号和第二时钟信号中的一个。 第一时钟信号被配置为用于同步模拟系统的操作,并且第二时钟信号被配置为用于同步数字系统的操作。 该方法包括使用模拟系统的相位检测器来测量相对于第二时钟信号的第一时钟信号的定时; 并且该方法包括控制数字系统的延迟元件,以基于相位检测器的测量来调节定时,以抑制模拟系统中的噪声。

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