公开(公告)号：US11791300B2

公开(公告)日：2023-10-17

申请号：US17135161

申请日：2020-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Fang-Lin Tsai ,  Chia-Yu Kuo ,  Pei-Geng Weng ,  Wei-Son Tsai ,  Yih-Jenn Jiang

IPC: H01L23/31 ,  H01L23/00

CPC classification number: H01L24/20 ,  H01L23/3157 ,  H01L2224/211 ,  H01L2224/2101 ,  H01L2224/214 ,  H01L2224/2105 ,  H01L2924/3511

Abstract: An electronic package is provided, where a circuit layer and a metal layer having a plurality of openings are formed on a dielectric layer of a circuit portion to reduce the area ratio of the metal layer to the dielectric layer, so as to reduce stress concentration and prevent warping of the electronic package.

公开(公告)号：US20220189900A1

公开(公告)日：2022-06-16

申请号：US17171764

申请日：2021-02-09

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chia-Yu Kuo ,  Rui-Feng Tai ,  Yih-Jenn Jiang ,  Don-Son Jiang ,  Chang-Fu Lin

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: An electronic package is provided and includes at least one conductor with a relatively large width formed on an electrode pad of an electronic element and in contact with a circuit layer. As such, when the electronic element and the circuit layer deviate in position relative to one another, the circuit layer will be still in contact with the conductor and hence electrically connected to the electronic element.

公开(公告)号：US20220148996A1

公开(公告)日：2022-05-12

申请号：US17135161

申请日：2020-12-28

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Fang-Lin Tsai ,  Chia-Yu Kuo ,  Pei-Geng Weng ,  Wei-Son Tsai ,  Yih-Jenn Jiang

IPC: H01L23/00 ,  H01L23/31

Abstract: An electronic package is provided, where a circuit layer and a metal layer having a plurality of openings are formed on a dielectric layer of a circuit portion to reduce the area ratio of the metal layer to the dielectric layer, so as to reduce stress concentration and prevent warping of the electronic package.