公开(公告)号：US20240363576A1

公开(公告)日：2024-10-31

申请号：US18307002

申请日：2023-04-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

发明人： WEI-YU CHOU ,  YANG-CHE CHEN ,  YI-LUN YANG ,  TING-YUAN HUANG ,  HSIANG-TAI LU

IPC分类号： H01L23/00 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L25/16 ,  H01L25/18

CPC分类号： H01L24/26 ,  H01L21/563 ,  H01L23/3185 ,  H01L24/16 ,  H01L24/19 ,  H01L24/20 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83855 ,  H01L2224/92125 ,  H01L2924/01013 ,  H01L2924/01022 ,  H01L2924/01029 ,  H01L2924/01074 ,  H01L2924/01079

摘要： A semiconductor package structure includes a semiconductor die encapsulated in a molding compound, a redistribution structure over the semiconductor die and the molding compound, a surface device over and electrically connected to the redistribution structure, a first connector over and electrically connected to the redistribution structure, a second connector between the surface device and the redistribution structure, a trench in the redistribution structure and laterally surrounding the surface device in a top view of the semiconductor package structure, and an underfill. The second connector electrically connects the surface device to the redistribution structure. The underfill surrounds the second connector. The underfill include a first portion and a second portion. The first portion of the underfill is located between the surface device and the redistribution structure and laterally surrounding the second connector, and the second portion of the underfill is disposed in the trench.

公开(公告)号：US20240363470A1

公开(公告)日：2024-10-31

申请号：US18765853

申请日：2024-07-08

申请人： Amkor Technology Singapore Holding Pte. Ltd.

发明人： Yeong Beom Ko ,  Dong Jin Kim ,  Se Woong Cha

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538

CPC分类号： H01L23/3185 ,  H01L21/561 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73209 ,  H01L2224/73253 ,  H01L2224/73267 ,  H01L2224/81005 ,  H01L2224/92124 ,  H01L2224/92242 ,  H01L2224/92244 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/1434 ,  H01L2924/181 ,  H01L2924/18162

摘要： A semiconductor product in the form of a stack chip package and a method of manufacturing the same, where a plurality of semiconductor chips are stacked one on another so as to enable the exchange of electrical signals between the semiconductor chips, and where a conductive layer is included for inputting and outputting signals to and from individual chips. A stack chip package having a compact size may, for example, be manufactured by stacking, on a first semiconductor chip, a second semiconductor chip having a smaller surface area by means of interconnection structures so as to enable the exchange of electrical signals between the first and second semiconductor chips, and by using a conductive layer for inputting and outputting signals to and from individual semiconductor chips, in lieu of a thick substrate. Furthermore, heat dissipation effects can be enhanced by the addition of a heat dissipation unit.

公开(公告)号：US20240363464A1

公开(公告)日：2024-10-31

申请号：US18767895

申请日：2024-07-09

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chih-Hsuan Tai ,  Chih-Hua Chen ,  Hao-Yi Tsai ,  Yu-Chih Huang ,  Chia-Hung Liu ,  Ting-Ting Kuo

IPC分类号： H01L23/31 ,  H01L21/56 ,  H01L21/66 ,  H01L21/683 ,  H01L21/78 ,  H01L23/00 ,  H01L23/522 ,  H01L23/532 ,  H01L23/538 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L23/3114 ,  H01L21/56 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/78 ,  H01L22/20 ,  H01L22/32 ,  H01L23/3128 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53238 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/82 ,  H01L24/92 ,  H01L24/97 ,  H01L25/105 ,  H01L25/50 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16145 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/82005 ,  H01L2224/83005 ,  H01L2224/83101 ,  H01L2224/92244 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/06596 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/15311

摘要： A package structure is provided. The package structure includes a die, an encapsulant, a first redistribution line (RDL) structure, a second RDL structure, and a through via. The encapsulant laterally encapsulates the die. The first redistribution line (RDL) structure on a first side of the die and the encapsulant, wherein the first RDL structure comprises a dielectric layer and a redistribution layer in the dielectric layer. The second RDL structure is located on a second side of the die and the encapsulant. The through via extends through the encapsulant and the first redistribution line structure and connecting the second RDL structure. The through via is laterally separated from the redistribution layer by the dielectric layer therebetween.

公开(公告)号：US12132074B2

公开(公告)日：2024-10-29

申请号：US18306222

申请日：2023-04-24

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Wen-Shiang Liao ,  Chih-Hang Tung

IPC分类号： H01L23/495 ,  H01F27/24 ,  H01F27/28 ,  H01F41/04 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L49/02

CPC分类号： H01L28/10 ,  H01F27/24 ,  H01F27/2804 ,  H01F41/041 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/19 ,  H01L24/20 ,  H01L24/97 ,  H01F2027/2809 ,  H01L2224/211 ,  H01L2224/221 ,  H01L2224/95001 ,  H01L2924/1427 ,  H01L2924/19042

摘要： A package includes a first redistribution structure, a second redistribution structure, an inductor, a permalloy core, and a die. The second redistribution structure is over the first redistribution structure. The inductor includes a first portion, a second portion, and a third portion. The first portion is embedded in the first redistribution structure, the third portion is embedded in the second redistribution structure, and the second portion connects the first and third portions of the inductor. The permalloy core is located between the first and third portions of the inductor. The die is disposed adjacent to the second portion of the inductor.

公开(公告)号：US20240355782A1

公开(公告)日：2024-10-24

申请号：US18756525

申请日：2024-06-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Ming-Fa Chen ,  Tzuan-Horng Liu ,  Chao-Wen Shih ,  Sung-Feng Yeh ,  Nien-Fang Wu

IPC分类号： H01L25/065 ,  H01L21/3105 ,  H01L21/56 ,  H01L21/66 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L23/522 ,  H01L23/528 ,  H01L23/544 ,  H01L25/00

CPC分类号： H01L25/0657 ,  H01L21/31053 ,  H01L21/56 ,  H01L21/6836 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3135 ,  H01L23/481 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/544 ,  H01L24/05 ,  H01L24/19 ,  H01L24/20 ,  H01L24/27 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/50 ,  H01L22/32 ,  H01L24/29 ,  H01L2221/68327 ,  H01L2223/54426 ,  H01L2224/27616 ,  H01L2224/29187 ,  H01L2224/32145 ,  H01L2224/73267 ,  H01L2224/8313 ,  H01L2224/83896 ,  H01L2224/92244 ,  H01L2225/06541 ,  H01L2225/06548 ,  H01L2225/06568 ,  H01L2225/06586

摘要： In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.

公开(公告)号：US20240355760A1

公开(公告)日：2024-10-24

申请号：US18302503

申请日：2023-04-18

申请人： STATS ChipPAC Pte. Ltd.

发明人： Peik Eng Ooi ,  Gai Leong Lai

IPC分类号： H01L23/00

CPC分类号： H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L2224/19 ,  H01L2224/2105 ,  H01L2224/214 ,  H01L2224/215 ,  H01L2924/01013 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01079

摘要： A semiconductor device has a substrate and a first RDL formed over the substrate. A second RDL is formed over the first RDL with a first conductive via electrically connecting the first RDL and second RDL and a first opening formed in the second RDL around the first conductive via for stress relief. The first opening formed in the second RDL can have a semi-circle shape or a plurality of semi-circles or segments. A third RDL is formed over the second RDL with a second conductive via electrically connecting the second RDL and third RDL and a second opening formed in the third RDL around the second conductive via for stress relief. The first opening is offset from the second opening. A plurality of first openings can be formed around the first conductive via for stress relief, each offset from one another.

公开(公告)号：US20240355697A1

公开(公告)日：2024-10-24

申请号：US18762478

申请日：2024-07-02

申请人： Intel Corporation

发明人： Lizabeth Keser ,  Thomas Ort ,  Thomas Wagner ,  Bernd Waidhas

IPC分类号： H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/66 ,  H01L21/78 ,  H01L23/00 ,  H01L23/538

CPC分类号： H01L23/3192 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/78 ,  H01L22/14 ,  H01L23/3114 ,  H01L23/5383 ,  H01L23/5386 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/96 ,  H01L23/3128 ,  H01L2224/18 ,  H01L2224/214 ,  H01L2224/95001

摘要： A semiconductor device and method is disclosed. Devices shown include a die coupled to an integrated routing layer, wherein the integrated routing layer includes a first width that is wider than the die. Devices shown further included a molded routing layer coupled to the integrated routing layer.

公开(公告)号：US12119338B2

公开(公告)日：2024-10-15

申请号：US18447655

申请日：2023-08-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Jie Chen ,  Ying-Ju Chen ,  Hsien-Wei Chen

IPC分类号： H01L21/44 ,  H01L21/56 ,  H01L21/683 ,  H01L21/768 ,  H01L21/78 ,  H01L23/00 ,  H01L23/12 ,  H01L23/31 ,  H01L23/498 ,  H01L23/538 ,  H01L23/544 ,  H01L23/58 ,  H01L25/00 ,  H01L25/065 ,  H01L25/10

CPC分类号： H01L25/50 ,  H01L21/56 ,  H01L21/561 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6835 ,  H01L21/76838 ,  H01L21/78 ,  H01L23/12 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L23/544 ,  H01L23/562 ,  H01L23/585 ,  H01L24/06 ,  H01L24/19 ,  H01L24/20 ,  H01L24/73 ,  H01L24/97 ,  H01L25/0657 ,  H01L24/32 ,  H01L24/48 ,  H01L25/105 ,  H01L2221/68372 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/2518 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2225/06568 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18162 ,  H01L2924/18165 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/73265 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/97 ,  H01L2224/73265 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2224/45099 ,  H01L2924/00014 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2924/15311 ,  H01L2224/73265 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2224/85399

摘要： Semiconductor device packages, packaging methods, and packaged semiconductor devices are disclosed. In some embodiments, a package for a semiconductor device includes an integrated circuit die mounting region and a molding material disposed around the integrated circuit die mounting region. An interconnect structure is disposed over the molding material and the integrated circuit die mounting region. A protection pattern is disposed in a perimeter region of the package. The protection pattern includes a conductive feature.

公开(公告)号：US20240339392A1

公开(公告)日：2024-10-10

申请号：US18599624

申请日：2024-03-08

申请人： InnoLux Corporation

发明人： Chih-Hao CHANG ,  Te-Hsun LIN ,  Wen-Hsiang LIAO

IPC分类号： H01L23/498 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L23/49827 ,  H01L24/20 ,  H01L24/16 ,  H01L24/19 ,  H01L2224/16227 ,  H01L2224/19 ,  H01L2224/211

摘要： An electronic device includes a circuit structure including: a first insulation layer including a first opening; a second insulation layer disposed in the first opening and including a second opening; a conductive connection layer disposed in the second opening; and a first conductive layer and a second conductive layer respectively disposed on a surface and another surface of the first insulation layer. The first and the second conductive layer are electrically connected through the conductive connection layer, and the Young's modulus of the second insulation layer is less than the Young's modulus of the first insulation layer. In a cross-section of the electronic device, a center of the second opening and an outer surface of the second insulation layer are separated by a first distance X1, and a maximum width W of the second opening and the first distance X1 conform to the following formula:






1
.
5

⁢
W

≦

X
1

公开(公告)号：US20240339385A1

公开(公告)日：2024-10-10

申请号：US18626080

申请日：2024-04-03

申请人： NEPES LAWEH CORPORATION ,  nepes hayyim

发明人： Byungcheol Kim ,  Mary Maye Melgo

IPC分类号： H01L23/495 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

CPC分类号： H01L23/49575 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49517 ,  H01L23/49541 ,  H01L24/16 ,  H01L24/20 ,  H01L24/32 ,  H01L24/83 ,  H01L25/105 ,  H01L2224/16227 ,  H01L2224/21 ,  H01L2224/32245 ,  H01L2224/83

摘要： A semiconductor package according to an embodiment includes frames; a first semiconductor device disposed on the frames; at least one conductive post disposed on the frames and laterally spaced apart from the first semiconductor device; an encapsulation member surrounding the first semiconductor device and the conductive post; and a redistribution layer disposed on the encapsulation member and electrically connected to the first semiconductor device and the conductive post.