METHOD FOR DRESSING POLISHING PADS
    1.
    发明申请
    METHOD FOR DRESSING POLISHING PADS 审中-公开
    用于磨光抛光垫的方法

    公开(公告)号:US20160199964A1

    公开(公告)日:2016-07-14

    申请号:US14994202

    申请日:2016-01-13

    申请人: Siltronic AG

    IPC分类号: B24B53/017

    CPC分类号: B24B53/017

    摘要: A method dresses one polishing cloth or two polishing pads simultaneously, in which a polishing cloth has been applied to a polishing plate, with at least one dresser (4), which is equipped with at least one dressing element (8), this at least one dressing element (8) being in contact with the at least one polishing cloth (11, 12) to be dressed, wherein the at least one polishing plate (21, 22) is rotated with a relative rotational speed and the at least one dresser (4) is rotated with a relative rotational speed and at least two different combinations of directions of rotation of the two pairs of polishing plates (21, 22) and pin wheels (31, 32) are executed during the simultaneous dressing of two polishing pads (11, 12) or during the dressing of one polishing cloth (11) of the polishing plate (21) and of the at least one dresser (4).

    摘要翻译: 一种方法是将至少一个装有至少一个修整元件(8)的修整器(4),同时将一个抛光布或两个抛光垫连接在一起,其中抛光布已经被施加到抛光板上, 一个修整元件(8)与要被修整的所述至少一个抛光布(11,12)接触,其中所述至少一个抛光板(21,22)以相对转动速度旋转,并且所述至少一个修整器 (4)以相对旋转速度旋转,并且在同时修整两个抛光垫期间执行两对抛光板(21,22)和针轮(31,32)的旋转方向的至少两种不同组合 (11,12)或在抛光板(21)和至少一个修整器(4)的一个抛光布(11)的修整期间。

    Method for polishing a semiconductor wafer

    公开(公告)号:US10189142B2

    公开(公告)日:2019-01-29

    申请号:US14093082

    申请日:2013-11-29

    申请人: Siltronic AG

    摘要: A method for polishing at least one wafer composed of semiconductor material that has a front side and the rear side includes performing at least one first polishing step including simultaneously polishing both front and rear sides of the at least one wafer at a process temperature between an upper polishing plate and a lower polishing plate. Each of the upper polishing and lower polishing plates is covered with a polishing pad having an inner edge and an outer edge, a hardness of at least 80° Shore A, a compressibility of less than 2.5%, and respective upper and lower surfaces that come into contact with the wafer being polished. The upper and lower surfaces form a polishing gap extending from the inner edge to the outer edge. A height of the polishing gap at the inner edge differs linearly from the height of the polishing gap at the outer edge.

    Method for polishing a semiconductor wafer on both sides

    公开(公告)号:US11161217B2

    公开(公告)日:2021-11-02

    申请号:US16340223

    申请日:2017-10-27

    申请人: SILTRONIC AG

    发明人: Vladimir Dutschke

    IPC分类号: B24B37/04 H01L21/306

    摘要: Semiconductor wafers are polished on both sides between polishing pads of a Shore A hardness of at least 80 and a compressibility of less than 3%, attached to upper and lower polishing plates, the polishing pads attached to the upper and lower polishing plates by bonding the polishing pads to the plates, and positioning an intermediate pad having a compressibility of at least 3% between the two bonded polishing pads as an intermediate layer and then pressing together the two polishing pads with the intermediate pad situated therebetween for a period of time.

    Method for dressing polishing pads

    公开(公告)号:US11148250B2

    公开(公告)日:2021-10-19

    申请号:US14994202

    申请日:2016-01-13

    申请人: Siltronic AG

    摘要: A method dresses one polishing cloth or two polishing pads simultaneously, in which a polishing cloth has been applied to a polishing plate, with at least one dresser (4), which is equipped with at least one dressing element (8), this at least one dressing element (8) being in contact with the at least one polishing cloth (11, 12) to be dressed, wherein the at least one polishing plate (21, 22) is rotated with a relative rotational speed and the at least one dresser (4) is rotated with a relative rotational speed and at least two different combinations of directions of rotation of the two pairs of polishing plates (21, 22) and pin wheels (31, 32) are executed during the simultaneous dressing of two polishing pads (11, 12) or during the dressing of one polishing cloth (11) of the polishing plate (21) and of the at least one dresser (4).

    METHOD FOR POLISHING A SEMICONDUCTOR WAFER
    5.
    发明申请
    METHOD FOR POLISHING A SEMICONDUCTOR WAFER 审中-公开
    抛光半导体波长的方法

    公开(公告)号:US20140206261A1

    公开(公告)日:2014-07-24

    申请号:US14093082

    申请日:2013-11-29

    申请人: Siltronic AG

    摘要: A method for polishing at least one wafer composed of semiconductor material that has a front side and the rear side includes performing at least one first polishing step including simultaneously polishing both front and rear sides of the at least one wafer at a process temperature between an upper polishing plate and a lower polishing plate. Each of the upper polishing and lower polishing plates is covered with a polishing pad having an inner edge and an outer edge, a hardness of at least 80° Shore A, a compressibility of less than 2.5%, and respective upper and lower surfaces that come into contact with the wafer being polished. The upper and lower surfaces form a polishing gap extending from the inner edge to the outer edge. A height of the polishing gap at the inner edge differs linearly from the height of the polishing gap at the outer edge.

    摘要翻译: 一种用于抛光由具有前侧和后侧的半导体材料组成的至少一个晶片的方法包括执行至少一个第一抛光步骤,所述至少一个第一抛光步骤包括同时在所述至少一个晶片的前侧和后侧之间以上 抛光板和下抛光板。 每个上抛光板和下抛光板被具有内边缘和外边缘的抛光垫覆盖,肖氏A至少80°的硬度,小于2.5%的压缩率,以及相应的上表面和下表面 与被抛光的晶片接触。 上表面和下表面形成从内边缘延伸到外边缘的抛光间隙。 在内边缘处的抛光间隙的高度与外边缘处的研磨间隙的高度线性相差。