公开(公告)号：US12031233B2

公开(公告)日：2024-07-09

申请号：US17611139

申请日：2020-04-01

申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Kyoko Okita ,  Tsubasa Honke

IPC分类号： B32B3/00 ,  C30B29/36 ,  H01L21/02 ,  H01L29/16 ,  H01L29/36 ,  C30B23/02

CPC分类号： C30B29/36 ,  H01L21/02021 ,  H01L21/02024 ,  H01L21/02052 ,  H01L29/1608 ,  H01L29/36 ,  C30B23/02

摘要： A silicon carbide substrate in accordance with the present disclosure includes a main surface. The silicon carbide substrate has a maximum diameter of 150 mm or more. In the main surface, a total area of a region in which a concentration of each of sodium, aluminum, potassium, calcium, titanium, iron, copper, and zinc is less than 5×1010 atoms/cm2 is more than or equal to 95% of an area of the main surface.

公开(公告)号：US20240203745A1

公开(公告)日：2024-06-20

申请号：US18286691

申请日：2022-03-16

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Tatsuo ABE ,  Yuki TANAKA

IPC分类号： H01L21/304 ,  H01L21/02 ,  H01L21/3065

CPC分类号： H01L21/304 ,  H01L21/02019 ,  H01L21/02024 ,  H01L21/3065

摘要： The present invention is a silicon wafer manufacturing method including a grinding step of grinding front and back surfaces of a raw wafer to obtain a wafer having an arithmetic surface roughness Sa per 2 μm2 of 10 nm or less; a dry-etching step of subjecting the wafer obtained in the grinding step to isotropic whole-surface dry-etching with an etching removal of 1 μm or less per surface to remove a mechanically damaged layer introduced into each of front and back surfaces of the wafer in the grinding step; and a double-side polishing step of, after the dry-etching step, polishing both surfaces of the wafer with a stock removal of 3 μm or less per surface. Thus, the silicon wafer manufacturing method that enables to manufacture a wafer having high flatness can be provided.

公开(公告)号：US11820918B2

公开(公告)日：2023-11-21

申请号：US17365916

申请日：2021-07-01

申请人： ENTEGRIS, INC. ,  UNIVERSITY OF FLORIDA RESEARCH FOUNDATION, INC.

发明人： Rajiv K. Singh ,  Arul Arjunan ,  Deepika Singh ,  Chaitanya Ginde ,  Puneet Jawali

IPC分类号： H01L21/306 ,  C09G1/02 ,  C09K3/14 ,  H01L21/321 ,  B24B37/00 ,  B24B37/04 ,  C09G1/04 ,  H01L21/02

CPC分类号： C09G1/02 ,  B24B37/00 ,  B24B37/044 ,  C09G1/04 ,  C09K3/1409 ,  H01L21/02024 ,  H01L21/30625 ,  H01L21/3212

摘要： A method of CMP includes providing a slurry solution including ≥1 per-compound oxidizer in a concentration between 0.01 M and 2 M with a pH from 2 to 5 or 8 to 11, and ≥1 buffering agent which provides a buffering ratio ≥1.5 that compares an amount of a strong acid needed to reduce the pH from 9.0 to 3.0 as compared to an amount of strong acid to change the pH from 9.0 to 3.0 without the buffering agent. The slurry solution is exclusive any hard slurry particles or has only soft slurry particles that have throughout a Vickers hardness 1,000 kg/mm2 is pressed by a polishing pad with the slurry solution in between while rotating the polishing pad relative to the hard surface.

公开(公告)号：US11788203B2

公开(公告)日：2023-10-17

申请号：US17289455

申请日：2020-06-04

申请人： JX METALS CORPORATION

发明人： Shunsuke Oka ,  Hideki Kurita ,  Kenji Suzuki

IPC分类号： B32B3/00 ,  C30B25/18 ,  C30B29/40 ,  C30B33/10 ,  H01L21/02

CPC分类号： C30B25/186 ,  C30B29/403 ,  C30B33/10 ,  H01L21/02019 ,  H01L21/02021 ,  H01L21/02024

摘要： Provided is an indium phosphide substrate, a semiconductor epitaxial wafer, and a method for producing an indium phosphide substrate, which can satisfactorily suppress warpage of the back surface of the substrate. The indium phosphide substrate includes a main surface for forming an epitaxial crystal layer and a back surface opposite to the main surface, wherein the back surface has a SORI value of 2.5 μm or less, as measured with the back surface of the indium phosphide substrate facing upward.

公开(公告)号：US20190210186A1

公开(公告)日：2019-07-11

申请号：US15973936

申请日：2018-05-08

申请人： SK SILTRON CO., LTD.

发明人： Sang Ho LEE

IPC分类号： B24B57/02 ,  B24B37/04

CPC分类号： B24B57/02 ,  B24B37/04 ,  H01L21/02024

摘要： According to the present invention, there is provided a slurry supply system including: a slurry mixing unit configured to mix slurry; a slurry supply unit in which the slurry mixed in the slurry mixing unit is stored and configured to supply the slurry to a polishing apparatus; a pipe configured to connect the slurry mixing unit and the slurry supply unit; and a slurry cooling unit installed in at least one of pipes configured to connect the slurry supply unit and the polishing apparatus to cool down the mixed slurry.

公开(公告)号：US20180312725A1

公开(公告)日：2018-11-01

申请号：US15769934

申请日：2016-10-21

申请人： NITTA HAAS INCORPORATED

发明人： Noriaki SUGITA ,  Shuhei MATSUDA ,  Takayuki MATSUSHITA ,  Mika TAZURU

IPC分类号： C09G1/02 ,  H01L21/306

CPC分类号： C09G1/02 ,  B24B37/00 ,  B24B37/044 ,  H01L21/02024 ,  H01L21/304 ,  H01L21/30625

摘要： A polishing composition capable of suppressing surface defects and reducing haze is provided. The polishing composition includes: abrasives; at least one water-soluble polymer selected from vinyl alcohol-based resins having a 1,2-diol structural unit; a polyalcohol; and an alkali compound. Preferably, the polishing composition further includes a non-ionic surfactant.

公开(公告)号：US20180304437A1

公开(公告)日：2018-10-25

申请号：US16021980

申请日：2018-06-28

申请人： GlobalWafers Co., Ltd.

发明人： Emanuele Corsi ,  Ezio Bovio

IPC分类号： B24B37/015 ,  H01L21/02 ,  B24B49/14 ,  H01L21/66

CPC分类号： B24B37/015 ,  B24B49/14 ,  H01L21/02024 ,  H01L22/12 ,  H01L22/26

摘要： A non-transitory computer-readable storage media having computer-executable instructions embodied thereon for operating a polishing assembly for polishing of silicon wafers is provided. When executed by at least one processor, the computer-executable instructions cause the processor to receive thermal data of a portion of a polishing pad from a temperature sensor and determine a removal profile of a silicon wafer based at least in part on the thermal data. The computer-executable instructions cause the processor to operate a polishing head assembly to position the silicon wafer in contact with the polishing pad and to selectively vary the removal profile of the silicon wafer based at least in part on the thermal data.

公开(公告)号：US20180272497A1

公开(公告)日：2018-09-27

申请号：US15779141

申请日：2016-11-22

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Yuki TANAKA ,  Daichi KITAZUME ,  Syuichi KOBAYASHI

IPC分类号： B24B37/28 ,  B24B37/04

CPC分类号： B24B37/28 ,  B24B37/042 ,  H01L21/02024

摘要： A method for double-side polishing a wafer uses a double-side polishing machine wherein a carrier which is yet to be arranged in the double-side polishing machine is previously subjected to two-stage double-side polishing which uses a double-side polishing machine different from the double-side polishing machine adopted for double-side polishing the wafer and includes primary polishing using slurry containing abrasive grains and secondary polishing using an inorganic alkali solution containing no abrasive grain, the carrier subjected to the two-stage double-side polishing is arranged in the double-side polishing machine adopted for double-side polishing the wafer, and the double-side polishing of the wafer is performed. Consequently, the method for double-side polishing a wafer enables suppressing damages to wafers to be polished immediately after arranging the carrier between the upper and lower turntables.

公开(公告)号：US09991175B2

公开(公告)日：2018-06-05

申请号：US15300653

申请日：2015-03-10

申请人： Toyo Tanso Co., Ltd.

发明人： Satoshi Torimi ,  Norihito Yabuki ,  Satoru Nogami

IPC分类号： H01L21/00 ,  H01L21/66 ,  H01L21/02 ,  H01L21/04 ,  H01L29/16

CPC分类号： H01L22/12 ,  H01L21/0201 ,  H01L21/02019 ,  H01L21/02024 ,  H01L21/0475 ,  H01L21/3065 ,  H01L29/1608

摘要： This method for estimating the depth of latent scratches in SiC substrates includes an etching step, a measurement step, and an estimation step. In the etching step, a SiC substrate in which at least the surface is formed from single crystal SiC, and which has been subjected to machining, is subjected to heat treatment under Si atmosphere to etch the surface of the SiC substrate. In the measurement step, the surface roughness or the residual stress of the SiC substrate which has been subjected to the etching step is measured. In the estimation step, the depth of latent scratches or the presence or absence of latent scratches in the SiC substrate before the etching step are estimated on the basis of the results obtained in the measurement step.

公开(公告)号：US09981361B2

公开(公告)日：2018-05-29

申请号：US14917105

申请日：2014-09-22

申请人： SHIN-ETSU HANDOTAI CO., LTD.

发明人： Junichi Ueno ,  Michito Sato ,  Kaoru Ishii

IPC分类号： B24B53/00 ,  B24B53/017 ,  H01L21/02

CPC分类号： B24B53/017 ,  H01L21/02024

摘要： A dressing apparatus for dressing a urethane foam pad, for use in polishing, by bringing diamond abrasive grains into sliding contact with the urethane foam pad, includes a support for holding the grains. The grains have multiple grit sizes, and include a high-grit diamond abrasive grain with a grit size of #170 or more and a low-grit diamond abrasive grain with a grit size of #140 or less. The grains are held by the support such that height positions of dressing surfaces of the grains are on the same plane. The dressing surfaces come into contact with the urethane foam pad. As a result, a dressing apparatus is capable of sufficiently roughening the surface of the urethane foam pad by one-time dressing without closing holes of the foaming part of the urethane foam pad, enabling short dressing time, long dressing interval, and inhibition of lowering of productivity.