公开(公告)号：US20140152360A1

公开(公告)日：2014-06-05

申请号：US14093356

申请日：2013-11-29

申请人： SK hynix Inc.

发明人： Dong-Suk SHIN

IPC分类号： H03L7/089

CPC分类号： H03L7/089 ,  H03K5/131 ,  H03K5/14 ,  H03K2005/0028

摘要： A delay value control circuit of a phase difference quantization circuit, wherein the phase difference quantization circuit has first to Nth (N is an integer equal to or greater than 2) delay units with binary weights. The delay value control circuit includes a replica delay unit replicating an Ath (2≦A≦N) delay unit; and a delay control unit configured to compare a phase of a first output signal generated from delaying an input signal with an A−1th delay unit and a phase of a second output signal generated from delaying the input signal with the Ath delay unit and the replica delay unit and configured to control a delay value of the Ath delay unit using a comparison result.

公开(公告)号：US20140103987A1

公开(公告)日：2014-04-17

申请号：US14093364

申请日：2013-11-29

申请人： SK hynix Inc.

发明人： Dong-Suk SHIN

IPC分类号： H03K5/14

CPC分类号： H03L7/089 ,  H03K5/131 ,  H03K5/14 ,  H03K2005/0028

摘要： A delay value control circuit of a phase difference quantization circuit, wherein the phase difference quantization circuit has first to Nth (N is an integer equal to or greater than 2) delay units with binary weights. The delay value control circuit includes a replica delay unit replicating an Ath (2≦A≦N) delay unit; and a delay control unit configured to compare a phase of a first output signal generated from delaying an input signal with an A−1th delay unit and a phase of a second output signal generated from delaying the input signal with the Ath delay unit and the replica delay unit and configured to control a delay value of the Ath delay unit using a comparison result.

摘要翻译： 一种相位差量化电路的延迟值控制电路，其中相位差量化电路具有二进制权重的第一至第N（N是等于或大于2的整数）延迟单元。 延迟值控制电路包括复制Ath（2＆amp; NlE; A＆N; E; N）延迟单元的复制延迟单元; 以及延迟控制单元，被配置为比较从延迟输入信号产生的第一输出信号与第一延迟单元的相位和从延迟输入信号而产生的第二输出信号的相位与Ath延迟单元和副本 延迟单元，并且被配置为使用比较结果来控制Ath延迟单元的延迟值。

公开(公告)号：US20150097605A1

公开(公告)日：2015-04-09

申请号：US14106793

申请日：2013-12-15

申请人： SK hynix Inc.

发明人： Dong-Suk SHIN ,  Hyun-Woo LEE

IPC分类号： H03K3/017

CPC分类号： H03K5/1565

摘要： A duty correction circuit includes a duty ratio control unit suitable for generating an output clock by adjusting the duty ratio of an input clock, a code generation unit suitable for detecting a duty of the output clock and generating a first duty ratio control code based on the detection result, and a code filter unit suitable for providing the duty ratio control unit with a second duty ratio control code corresponding to a target value when a value of the first duty ratio control code is within a predetermined critical range adjacent to the target value.

摘要翻译： 占空比校正电路包括：占空比控制单元，其适于通过调节输入时钟的占空比来产生输出时钟;适用于检测输出时钟的占空比的代码生成单元，并且基于该输出时钟生成第一占空比控制代码 检测结果以及代码过滤器单元，适用于当第一占空比控制代码的值在与目标值相邻的预定临界范围内时，为占空比控制单元提供与目标值相对应的第二占空比控制代码。