公开(公告)号：US20180277688A1

公开(公告)日：2018-09-27

申请号：US15709977

申请日：2017-09-20

Applicant: SK hynix Inc.

Inventor： Sun-Ha HWANG ,  Pyong-Su KWAG ,  Sang-Uk PARK ,  Kwang-Deok KIM ,  Ho-Ryeong LEE ,  Ju-Tae RYU

IPC: H01L29/94 ,  H01L49/02 ,  H01L27/146

CPC classification number: H01L29/94 ,  H01L23/5223 ,  H01L27/0805 ,  H01L27/14614 ,  H01L28/60 ,  H01L28/86

Abstract: A MOS capacitor may include: an isolation layer formed in a substrate and defining an active region; a first electrode formed in the active region, and including an impurity region spaced from the isolation layer; and a second electrode formed over the substrate overlapping the impurity region, and including a gate having a plurality of gate patterns adjacent to each other with a gap therebetween.