公开(公告)号：US20190268005A1

公开(公告)日：2019-08-29

申请号：US16237040

申请日：2018-12-31

Applicant: SK hynix Inc. ,  Seoul National University R&DB Foundation

Inventor： Suhwan KIM ,  Deog-Kyoon JEONG ,  Sang-Yoon LEE ,  Joo-Hyung CHAE ,  Chang-Ho HYUN

IPC: H03L7/089 ,  H03L7/087 ,  H04L7/033 ,  H04L7/00

Abstract: A data receiver circuit may include: a delay circuit suitable for delaying first and second strobe signals and generating delayed first and second strobe signals; a first receiver circuit suitable for sampling data in synchronization with the delayed first strobe signal; a second receiver circuit suitable for sampling the data in synchronization with the delayed second strobe signal; an enable signal generation circuit suitable for generating an enable signal indicating whether the data transitioned; a transition level generation circuit suitable for generating a transition level signal indicating a transition direction of the data; a phase shift circuit suitable for shifting the phase of the delayed first strobe signal by a set degree and generating a shifted first strobe signal; a sampling circuit suitable for sampling the data in synchronization with the shifted first strobe signal and generating a sampling result; and a control logic suitable for changing a delay value of the delay circuit in response to the transition level signal and the sampling result of the sampling circuit, when the enable signal is activated.