公开(公告)号：US20190149315A1

公开(公告)日：2019-05-16

申请号：US16230717

申请日：2018-12-21

Applicant: SOCIONEXT INC.

Inventor： Daisuke SUZUKI ,  Masahiro Kudo

IPC: H04L7/00 ,  H04L25/03

Abstract: An equalizer circuit includes: an addition circuit configured to add an input signal and a compensation signal; a comparison circuit configured to compare an output signal of the addition circuit; a plurality of first latch circuits configured to hold an output signal of the comparison circuit, the plurality of first latch circuits being connected in cascade; a selection circuit configured to select and output one of output signals of the comparison circuit and the plurality of first latch circuits; a second latch circuit configured to hold an output signal of the selection circuit; and a digital analog conversion circuit configured to generate the compensation signal, based on an output signal of the second latch circuit.

公开(公告)号：US20190229712A1

公开(公告)日：2019-07-25

申请号：US16215210

申请日：2018-12-10

Applicant: SOCIONEXT INC.

Inventor： Daisuke SUZUKI ,  Shigeaki Kawai

IPC: H03K3/017

Abstract: A transmission circuit includes: a data generating circuit configured to generate data based on a clock signal; a clock generating circuit configured to supply the clock signal to the data generating circuit; and a duty ratio controlling circuit configured to detect a duty cycle distortion of the data output from the data generating circuit, and control a duty ratio of the clock signal based on a result of the detection.