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公开(公告)号:US09685908B1
公开(公告)日:2017-06-20
申请号:US15207470
申请日:2016-07-11
Inventor: Mi Lim Lee , Ga Yeon Ko , Chang Kun Park
IPC: H03B5/12
CPC classification number: H03B5/124 , H03B5/1212 , H03B5/1228 , H03B5/1243 , H03B5/1253
Abstract: The present invention related to a varactor used in an integrated circuit of a differential structure. An exemplary embodiment of the present invention provides a variable capacitor connected between first and second signal lines which are differential signal lines included in an integrated circuit of a differential structure, including: a plurality of N-type semiconductors separately arranged; one or more P-type semiconductors disposed between the N-type semiconductors to make first and second PN junctions with N-type semiconductors contacting upper and lower portions thereof and to receive a control voltage, wherein, among the N-type semiconductors, first N-type semiconductors corresponding to (2n−1)-th (n being a positive integer) are connected with the first signal line, and second N-type semiconductors corresponding to 2n-th are connected with the second signal line, and parasitic capacitances of the first and second PN junctions are varied by adjusting the control voltage.
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公开(公告)号:US09374035B2
公开(公告)日:2016-06-21
申请号:US14571227
申请日:2014-12-15
Inventor: Mi Lim Lee , Chang Kun Park
CPC classification number: H03B5/1212
Abstract: An oscillator with a differential structure which is formed in an integrated circuit, including: a first transistor and a second transistor in each of which a drain electrode, a gate electrode, and a source electrode are sequentially arranged, a drain of the first transistor is connected with a gate of the second transistor through a first wiring, a drain of the second transistor is connected with a gate of the first transistor through a second wiring, and a first end of a source of the first transistor and a first end of a source of the second transistor are connected through a third wiring, and a second end of the source of the first transistor and a second end of the source of the second transistor are connected through a fourth wiring.
Abstract translation: 一种形成在集成电路中的差分结构的振荡器,包括:第一晶体管和第二晶体管,其中依次排列有漏电极,栅电极和源电极,第一晶体管的漏极为 通过第一布线与第二晶体管的栅极连接,第二晶体管的漏极通过第二布线与第一晶体管的栅极连接,第一晶体管的源极的第一端和第一晶体管的第一端 第二晶体管的源极通过第三布线连接,第一晶体管的源极的第二端和第二晶体管的源极的第二端通过第四布线连接。
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公开(公告)号:US09722556B1
公开(公告)日:2017-08-01
申请号:US15139327
申请日:2016-04-27
Inventor: Mi Lim Lee , Chang Kun Park
IPC: H03F3/45 , H03F1/56 , H03F3/195 , H01L23/66 , H01L25/065 , H01L23/538
CPC classification number: H03F3/45269 , H01L23/5384 , H01L23/66 , H01L25/0657 , H01L2223/6638 , H01L2224/48137 , H03F1/565 , H03F3/195 , H03F3/45475 , H03F2200/06 , H03F2200/09 , H03F2200/222 , H03F2200/387 , H03F2200/411 , H03F2200/451 , H03F2200/534 , H03F2200/541
Abstract: The present invention relates to a high frequency transformer for a differential amplifier. An exemplary embodiment of the present invention provides a high frequency transformer for a differential amplifier, including: a first metal line that is integrated and formed in an IC chip through a CMOS process and that is connected to a differential signal line of a transistor included in the IC chip; and a second metal line that is formed in an MEMS chip through an MEMS process and that is inductively coupled with the first metal line in a state spaced apart from an upper portion of the first metal line, wherein the MEMS chip may be stacked on an upper portion of the IC chip.
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