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公开(公告)号:US10573600B2
公开(公告)日:2020-02-25
申请号:US15649491
申请日:2017-07-13
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HeeJo Chi , NamJu Cho , JunWoo Myung
IPC: H01L23/538 , H01L21/48 , H01L21/56 , H01L23/00 , H01L21/683 , H01L23/498 , H01L23/552 , H01L25/065 , H05K1/18 , H01L23/31 , H01L23/367 , H05K3/00 , H05K3/42
Abstract: A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die.
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公开(公告)号:US20170309572A1
公开(公告)日:2017-10-26
申请号:US15649491
申请日:2017-07-13
Applicant: STATS ChipPAC Pte. Ltd.
Inventor: HeeJo Chi , NamJu Cho , JunWoo Myung
IPC: H01L23/538 , H01L21/48 , H01L23/00 , H01L23/552 , H01L23/498 , H01L21/683 , H01L21/56 , H01L25/065 , H05K1/18 , H05K3/42 , H05K3/00 , H01L23/367 , H01L23/31
Abstract: A semiconductor device has a first semiconductor die stacked over a second semiconductor die which is mounted to a temporary carrier. A plurality of bumps is formed over an active surface of the first semiconductor die around a perimeter of the second semiconductor die. An encapsulant is deposited over the first and second semiconductor die and carrier. A plurality of conductive vias is formed through the encapsulant around the first and second semiconductor die. A portion of the encapsulant and a portion of a back surface of the first and second semiconductor die is removed. An interconnect structure is formed over the encapsulant and the back surface of the first or second semiconductor die. The interconnect structure is electrically connected to the conductive vias. The carrier is removed. A heat sink or shielding layer can be formed over the encapsulant and first semiconductor die.
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