公开(公告)号：US20170207334A1

公开(公告)日：2017-07-20

申请号：US15479975

申请日：2017-04-05

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Angelo MAGRÍ ,  Giacomo BARLETTA

IPC: H01L29/78 ,  H01L21/308 ,  H01L29/739 ,  H01L21/265 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L29/7811 ,  H01L21/265 ,  H01L21/3081 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0661 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/7827

Abstract: An electronic device is integrated on a chip of semiconductor material having a main surface and a substrate region with a first type of conductivity. The electronic device has a vertical MOS transistor, formed in an active area having a body region with a second conductivity type. A set of one or more cells each one having a source region of the first conductivity, a gate region of electrically conductive material in a gate trench extending from the main surface in the body region and in the substrate region, and an insulating gate layer, and a termination structure with a plurality of termination rings surrounding at least part of the active area on the main surface, each termination ring having a floating element of electrically insulating material in the termination trench extending from the main surface in the chip and at least one bottom region of said semiconductor material of the second conductivity type extending from at least one deepest portion of a surface of the termination trench in the chip; the termination trenches have a depth from the main surface decreasing moving away from the active area.

公开(公告)号：US20150214300A1

公开(公告)日：2015-07-30

申请号：US14609320

申请日：2015-01-29

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Giacomo BARLETTA ,  Angelo MAGRÍ

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/7811 ,  H01L21/265 ,  H01L21/3081 ,  H01L29/0623 ,  H01L29/063 ,  H01L29/0661 ,  H01L29/66666 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/7827

Abstract: An electronic device is integrated on a chip of semiconductor material having a main surface and a substrate region with a first type of conductivity. The electronic device has a vertical MOS transistor, formed in an active area having a body region with a second conductivity type. A set of one or more cells each one having a source region of the first conductivity, a gate region of electrically conductive material in a gate trench extending from the main surface in the body region and in the substrate region, and an insulating gate layer, and a termination structure with a plurality of termination rings surrounding at least part of the active area on the main surface, each termination ring having a floating element of electrically insulating material in the termination trench extending from the main surface in the chip and at least one bottom region of said semiconductor material of the second conductivity type extending from at least one deepest portion of a surface of the termination trench in the chip; the termination trenches have a depth from the main surface decreasing moving away from the active area.

Abstract translation: 电子器件集成在具有第一导电类型的主表面和衬底区域的半导体材料芯片上。 电子器件具有形成在具有第二导电类型的主体区域的有源区域中的垂直MOS晶体管。 一组一个或多个单元，每个单元具有第一导电性的源极区域，在主体区域和基板区域中从主表面延伸的栅极沟槽中的导电材料的栅极区域以及绝缘栅极层， 以及端接结构，其具有围绕所述主表面上的所述有源区域的至少一部分的多个端接环，每个端接环具有从所述芯片中的主表面延伸的所述端接沟槽中的电绝缘材料的浮置元件，以及至少一个 所述第二导电类型的所述半导体材料的底部区域从所述芯片中的所述端接沟槽的表面的至少一个最深部分延伸; 终端沟槽具有从主表面的深度减小离开有效区域。