公开(公告)号：US20150221371A1

公开(公告)日：2015-08-06

申请号：US14605246

申请日：2015-01-26

Applicant: STMICROELECTRONICS S.r.I.

Inventor： Luca Milani ,  Fabrizio Torricelli ,  Anna Richelli ,  Luigi Colalongo ,  Zsolt Miklos Kovàcs-Vajna

IPC: G11C16/04 ,  H01L21/28 ,  H01L27/115 ,  G11C16/14 ,  G11C16/26

CPC classification number: G11C16/0408 ,  H01L21/28273 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11558 ,  H01L29/66825 ,  H01L29/7881

Abstract: A non-volatile memory includes memory cells arranged in rows and columns. Each memory cell includes a program/read portion and an erase portion that share an electrically floating layer of conductive material defining a first capacitive coupling with the program/read portion and a second capacitive coupling with the erase portion. The first capacitive coupling defines a first capacitance greater than a second capacitance defined by the second capacitive coupling. The erase portion is configured so that an electric current extracts charge carriers from the electrically floating layer to store a first logic value in the memory cell. The program/read portion is further configured so that an electric current injects charge carriers in the electrically floating layer to store a second logic value in the memory cell.

Abstract translation: 非易失性存储器包括以行和列排列的存储单元。 每个存储器单元包括程序/读取部分和擦除部分，其共享限定与程序/读取部分的第一电容耦合的导电材料的电浮置层和与擦除部分的第二电容耦合。 第一电容耦合限定大于由第二电容耦合限定的第二电容的第一电容。 擦除部分被配置为使得电流从电浮动层提取电荷载流子以将第一逻辑值存储在存储器单元中。 程序/读取部分被进一步配置成使得电流注入电浮置层中的电荷载流子以将第二逻辑值存储在存储单元中。