公开(公告)号：US10673447B2

公开(公告)日：2020-06-02

申请号：US16269303

申请日：2019-02-06

Applicant: STMicroelectronics (Alps) SAS

Inventor： Laurent Vaccariello

IPC: H03M1/66 ,  H03M1/00 ,  H03M1/46 ,  H03M1/06 ,  H03M1/80 ,  H03M1/12 ,  H03M1/36

Abstract: An N-bit type charge redistribution analog-to-digital conversion device includes an input terminal configured to receive an input signal and coupled via a line to an output terminal. The output terminal is configured to be coupled to a comparator. The device further includes three reference potential sources of different values and a network of capacitors, where a first terminal of each capacitor is coupled to the line, and where a second terminal of each capacitor is coupled to switching circuit configured for coupling the second terminal of each capacitor to one of the reference potentials.

公开(公告)号：US20190260382A1

公开(公告)日：2019-08-22

申请号：US16269303

申请日：2019-02-06

Applicant: STMicroelectronics (Alps) SAS

Inventor： Laurent Vaccariello

IPC: H03M1/00 ,  H03M1/46

Abstract: An N-bit type charge redistribution analog-to-digital conversion device includes an input terminal configured to receive an input signal and coupled via a line to an output terminal. The output terminal is configured to be coupled to a comparator. The device further includes three reference potential sources of different values and a network of capacitors, where a first terminal of each capacitor is coupled to the line, and where a second terminal of each capacitor is coupled to switching circuit configured for coupling the second terminal of each capacitor to one of the reference potentials.