公开(公告)号：US11734415B2

公开(公告)日：2023-08-22

申请号：US16922120

申请日：2020-07-07

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Vincent Berthelot

IPC: G06F21/53 ,  G06F12/14 ,  G06F21/60 ,  G06F21/72

CPC classification number: G06F21/53 ,  G06F12/1408 ,  G06F12/1466 ,  G06F21/602 ,  G06F21/606 ,  G06F21/72

Abstract: An embodiment integrated circuit comprises a first memory zone having a first level of access rights that is configured to store at least one first software application containing encrypted instructions, means for verifying the integrity of the first software application, an encryption/decryption means, for example a first logic circuit, that is configured to decrypt the encrypted instructions which are considered to exhibit integrity, a processing unit that is configured to execute the decrypted instructions, the first logic circuit being further configured to encrypt the data generated by the execution operation and a second means, for example a second logic circuit, that is configured to store the encrypted data in a second memory zone having a second level of access rights that is identical to the first level of access rights.

公开(公告)号：US20230385420A1

公开(公告)日：2023-11-30

申请号：US18320731

申请日：2023-05-19

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Vincent Berthelot

IPC: G06F21/57 ,  G06F21/60

CPC classification number: G06F21/575 ,  G06F21/604 ,  G06F2221/034

Abstract: In an embodiment a method includes executing, during a first phase, one or more first codes stored in a first immutable zone of a non-volatile memory of an electronic device, forbidding, by an access control circuit of the non-volatile memory, execution of any codes stored in a second zone of the non-volatile memory during the first phase, executing, during a second phase, one or more second codes stored in the second zone and forbidding, by the access control circuit, any access to the first zone during the second phase.

公开(公告)号：US11269986B2

公开(公告)日：2022-03-08

申请号：US16660243

申请日：2019-10-22

Applicant: STMicroelectronics (Grand Ouest) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Vincent Berthelot ,  Layachi Daineche

IPC: G06F21/00 ,  G06F21/44

Abstract: A memory stores a program to be executed by a microprocessor. The program includes a first program part and a second program part. An authenticator is configured to authenticate the program and includes a module that is external to the microprocessor and configured to authenticate said first program part when the microprocessor is inactive. The authenticator further activates the microprocessor to execute the first program part and authenticate said second program part using instructions of the first program part if the module has authenticated the first program part. The microprocessor then executes the second program part if the microprocessor has authenticated said second program part.

公开(公告)号：US20210011994A1

公开(公告)日：2021-01-14

申请号：US16922120

申请日：2020-07-07

Applicant: STMicroelectronics (Grand Ouest) SAS

Inventor： Vincent Berthelot

IPC: G06F21/53 ,  G06F21/60 ,  G06F21/72 ,  G06F12/14

Abstract: An embodiment integrated circuit comprises a first memory zone having a first level of access rights that is configured to store at least one first software application containing encrypted instructions, means for verifying the integrity of the first software application, an encryption/decryption means, for example a first logic circuit, that is configured to decrypt the encrypted instructions which are considered to exhibit integrity, a processing unit that is configured to execute the decrypted instructions, the first logic circuit being further configured to encrypt the data generated by the execution operation and a second means, for example a second logic circuit, that is configured to store the encrypted data in a second memory zone having a second level of access rights that is identical to the first level of access rights.