公开(公告)号：US20210109711A1

公开(公告)日：2021-04-15

申请号：US17038774

申请日：2020-09-30

申请人： STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

发明人： Rene Peyrard ,  Fabrice Romain ,  Jean-Michel Derien ,  Christophe Eichwald

IPC分类号： G06F7/57 ,  G06F7/76 ,  G06F9/30 ,  H03K19/21

摘要： An embodiment relates to a method for processing masked data using a processor comprising an arithmetic and logic unit, in which the masked data remain masked during their processing in the arithmetic and logic unit.

公开(公告)号：US11922133B2

公开(公告)日：2024-03-05

申请号：US17038774

申请日：2020-09-30

申请人： STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Rousset) SAS

发明人： Rene Peyrard ,  Fabrice Romain ,  Jean-Michel Derien ,  Christophe Eichwald

IPC分类号： G06F7/57 ,  G06F7/76

CPC分类号： G06F7/57 ,  G06F7/764

摘要： A method includes processing, by an arithmetic and logic unit of a processor, masked data, and keeping, by the arithmetic and logic unit of the processor, the masked data masked throughout their processing by the arithmetic and logic unit. A processor includes an arithmetic and logic unit configured to keep masked data masked throughout processing of the masked data in the arithmetic and logic unit.