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Patent Agency Ranking
公开(公告)号：US09390988B2
公开(公告)日：2016-07-12
申请号：US13630872
申请日：2012-09-28
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Mark A. Azzopardi , Kevin Formosa , Ivan Ellul
CPC classification number: H01L23/10 , B81C1/00269 , B81C2203/019 , H01L2924/0002 , H01L2924/16152 , Y10T428/1241 , Y10T428/13 , H01L2924/00
Abstract: One embodiment discloses a method for soldering a cap for an integrated electronic device to a support layer, including the steps of: providing a support layer; providing a cap including a core of a first material and a coating layer of a second material, the first and second material being respectively wettable and non-wettable with respect to a solder, the coating layer being arranged so as to expose a surface of the core; coupling the cap with the support layer; and soldering the surface of the core to the support layer, by means of the solder.
Abstract translation: 一个实施例公开了一种用于将集成电子设备的盖焊接到支撑层的方法，包括以下步骤：提供支撑层; 提供包括第一材料的芯和第二材料的涂层的盖，所述第一和第二材料分别相对于焊料可润湿和不可湿润，所述涂层被布置为暴露所述第一材料的表面 核心; 将盖与支撑层联接; 并通过焊料将芯的表面焊接到支撑层。
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公开(公告)号：US09950511B2
公开(公告)日：2018-04-24
申请号：US15277825
申请日：2016-09-27
Applicant: STMICROELECTRONICS, INC. , STMICROELECTRONICS (MALTA) LTD
Inventor： Simon Dodd , Ivan Ellul , Christopher Brincat
CPC classification number: B41J2/01 , B41J2/04548 , B41J2/14072 , B41J2/14201 , B41J2/1433 , B41J2002/14362 , B41J2002/14491
Abstract: One or more embodiments are directed to a microfluidic assembly that includes an interconnect substrate coupled to a microfluidic die. In one embodiment, the microfluidic die includes a ledge with a plurality of bond pads. The microfluidic assembly further includes an interconnect substrate having an end resting on the ledge proximate the bond pads. In another embodiment, the interconnect substrate abuts a side surface of the ledge or is located proximate the ledge. Conductive elements couple the microfluidic die to contacts of the interconnect substrate. Encapsulant is located over the conductive elements, the bond pads, the contacts.
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公开(公告)号：US10357964B2
公开(公告)日：2019-07-23
申请号：US15917231
申请日：2018-03-09
Applicant: STMICROELECTRONICS, INC. , STMICROELECTRONICS (MALTA) LTD
Inventor： Simon Dodd , Ivan Ellul , Christopher Brincat
Abstract: One or more embodiments are directed to a microfluidic assembly that includes an interconnect substrate coupled to a microfluidic die. In one embodiment, the microfluidic die includes a ledge with a plurality of bond pads. The microfluidic assembly further includes an interconnect substrate having an end resting on the ledge proximate the bond pads. In another embodiment, the interconnect substrate abuts a side surface of the ledge or is located proximate the ledge. Conductive elements couple the microfluidic die to contacts of the interconnect substrate. Encapsulant is located over the conductive elements, the bond pads, the contacts.
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公开(公告)号：US09698040B2
公开(公告)日：2017-07-04
申请号：US14926084
申请日：2015-10-29
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Jeremy Spiteri , Ivan Ellul
IPC: H01L21/683 , H01L21/66 , H01L21/68
CPC classification number: H01L21/6836 , H01L21/681 , H01L21/6835 , H01L22/12 , H01L2221/68309 , H01L2221/68313
Abstract: A semiconductor device carrier tape with image sensor detectable dimples is disclosed. The dimpled carrier tape is formed of a flexible strip of material. A plurality of pockets are disposed spaced apart along the length of the flexible strip of material. Each pocket is configured to hold a semiconductor device. A dimple is formed in each of the plurality of pockets where each dimple has a peripheral edge and a bottom surface. Detection of the dimple by an image sensor facilitates alignment of a semiconductor device with the pocket and precise placement of the semiconductor device in the pocket.
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公开(公告)号：US20170125276A1
公开(公告)日：2017-05-04
申请号：US14926084
申请日：2015-10-29
Applicant: STMicroelectronics (Malta) Ltd
Inventor： Jeremy Spiteri , Ivan Ellul
IPC: H01L21/683 , H01L21/68 , H01L21/66
CPC classification number: H01L21/6836 , H01L21/681 , H01L21/6835 , H01L22/12 , H01L2221/68309 , H01L2221/68313
Abstract: A semiconductor device carrier tape with image sensor detectable dimples is disclosed. The dimpled carrier tape is formed of a flexible strip of material. A plurality of pockets are disposed spaced apart along the length of the flexible strip of material. Each pocket is configured to hold a semiconductor device. A dimple is formed in each of the plurality of pockets where each dimple has a peripheral edge and a bottom surface. Detection of the dimple by an image sensor facilitates alignment of a semiconductor device with the pocket and precise placement of the semiconductor device in the pocket.
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