公开(公告)号：US20190172786A1

公开(公告)日：2019-06-06

申请号：US16260394

申请日：2019-01-29

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Christian RIVERO ,  Jean-Philippe ESCALES

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/31 ,  H01L21/311 ,  H01L23/532

Abstract: A stack including a dual-passivation is etched locally so as to reveal contact pads of an integrated circuit which are situated above a last metallization level of an interconnection part of the integrated circuit. This stack serves to protect the integrated circuit against a breakdown of at least one dielectric region, at least in part porous, separating two electrically conducting elements of the interconnection part of the integrated circuit. Such a breakdown may occur due to electrical conduction assisted by the presence of defects within the at least one dielectric region.