-
公开(公告)号：US11609851B2
公开(公告)日：2023-03-21
申请号：US17229161
申请日：2021-04-13
Inventor： Laurent Folliot , Emanuele Plebani , Mirko Falchetto
Abstract: According to one aspect, a method for determining, for a memory allocation, placements in a memory area of data blocks generated by a neural network, comprises a development of an initial sequence of placements of blocks, each placement being selected from several possible placements, the initial sequence being defined as a candidate sequence, a development of at least one modified sequence of placements from a replacement of a given placement of the initial sequence by a memorized unselected placement, and, if the planned size of the memory area obtained by this modified sequence is less than that of the memory area of the candidate sequence, then this modified sequence becomes the candidate sequence, the placements of the blocks for the allocation being those of the placement sequence defined as a candidate sequence once each modified sequence has been developed.
-
公开(公告)号：US20210342265A1
公开(公告)日：2021-11-04
申请号：US17229161
申请日：2021-04-13
Inventor： Laurent Folliot , Emanuele Plebani , Mirko Falchetto
Abstract: According to one aspect, a method for determining, for a memory allocation, placements in a memory area of data blocks generated by a neural network, comprises a development of an initial sequence of placements of blocks, each placement being selected from several possible placements, the initial sequence being defined as a candidate sequence, a development of at least one modified sequence of placements from a replacement of a given placement of the initial sequence by a memorized unselected placement, and, if the planned size of the memory area obtained by this modified sequence is less than that of the memory area of the candidate sequence, then this modified sequence becomes the candidate sequence, the placements of the blocks for the allocation being those of the placement sequence defined as a candidate sequence once each modified sequence has been developed.
-
Patent Agency Ranking
公开(公告)号：US20220107990A1
公开(公告)日：2022-04-07
申请号：US17480639
申请日：2021-09-21
Inventor： Laurent Folliot , Mirko Falchetto , Pierre Demaj
Abstract: In an embodiment a method for managing a convolutional calculation carried out by a calculation unit adapted to calculate output data on output channels from convolution kernels applied to input data blocks on at least one input channel, wherein calculations on each input data block correspond respectively to an output datum on an output channel, and wherein the calculations with each convolution kernel correspond to the output data on each output channel respectively includes identifying a size of a memory location available in a temporary working memory of the calculation unit, pre-loading in the temporary working memory a maximum number of convolution kernels storable at the size of the memory; and controlling the calculation unit to calculate a set of output data calculable from pre-loaded convolution kernels.
-
公开(公告)号：US20220188610A1
公开(公告)日：2022-06-16
申请号：US17455770
申请日：2021-11-19
Inventor： Laurent Folliot , Mirko Falchetto , Pierre Demaj
Abstract: According to an aspect, a method is proposed for defining placements, in a volatile memory, of temporary scratch buffers used during an execution of an artificial neural network, the method comprising: determining an execution order of layers of the neural network, defining placements, in a heap memory zone of the volatile memory, of intermediate result buffers generated by each layer, according to the execution order of the layers, determining at least one free area of the heap memory zone over the execution of the layers, defining placements of temporary scratch buffers in the at least one free area of the heap memory zone according to the execution order of the layers.
-
公开(公告)号：US09600744B2
公开(公告)日：2017-03-21
申请号：US13869652
申请日：2013-04-24
Applicant: STMicroelectronics S.r.l.
Inventor： Danilo Pietro Pau , Mirko Falchetto
CPC classification number: G06K9/6228 , G06K9/32 , G06K9/46 , G06K2009/363 , G06T7/33 , G06T7/337 , H04N19/57
Abstract: Image-processing apparatus and methods to adaptively vary an interest point threshold value and control a number of interest points identified in an image frame are described. Sub-regions of an image frame may be processed in a sequence, and an interest point threshold value calculated for each sub-region. The calculated value of the interest point threshold may depend upon pre-selected values and values determined from the processing of one or more prior sub-regions. By using adaptive thresholding, a number of interest points detected for each frame in a sequence of image frames may remain substantially constant, even though objects within the frames may vary appreciably.
-
公开(公告)号：US09569695B2
公开(公告)日：2017-02-14
申请号：US13869656
申请日：2013-04-24
Applicant: STMicroelectronics S.r.l.
Inventor： Danilo Pietro Pau , Paolo Pasteris , Mirko Falchetto
CPC classification number: G06K9/6228 , G06K9/32 , G06K9/46 , G06K2009/363 , G06T7/33 , G06T7/337 , H04N19/57
Abstract: Image-processing apparatus and methods to adaptively control a size and/or location of a visual search window used for feature matching in a machine-vision system are described. A search window controller may receive motion vector data and image recognition rate data, and compute a search window size and/or search window location based on the received data. The computed search window size may be a portion of an image frame. The motion vector data and image recognition rate data may be computed from one or more images in a video image sequence. By adaptively controlling search window size and location, an appreciable reduction in data processing burden for feature matching may be achieved.
Abstract translation: 描述了在机器视觉系统中自适应地控制用于特征匹配的视觉搜索窗口的尺寸和/或位置的图像处理设备和方法。 搜索窗口控制器可以接收运动矢量数据和图像识别率数据，并且基于接收到的数据来计算搜索窗口大小和/或搜索窗口位置。 所计算的搜索窗口大小可以是图像帧的一部分。 可以从视频图像序列中的一个或多个图像计算运动矢量数据和图像识别率数据。 通过自适应地控制搜索窗口大小和位置，可以实现特征匹配的数据处理负担的明显降低。
-
7.发明授权公开(公告)号：US11461142B2
公开(公告)日：2022-10-04
申请号：US16924091
申请日：2020-07-08
Applicant: STMicroelectronics S.r.l.
Inventor： Emanuele Plebani , Mirko Falchetto , Danilo Pietro Pau
Abstract: Methods, microprocessors, and systems are provided for implementing an artificial neural network. Data buffers in virtual memory are coupled to respective processing layers in the artificial neural network. An ordered visiting sequence of layers of the artificial neural network is obtained. A virtual memory allocation schedule is produced as a function of the ordered visiting sequence of layers of the artificial neural network, the schedule including a set of instructions for memory allocation and deallocation operations applicable to the data buffers. A physical memory configuration dataset is computed as a function of the virtual memory allocation schedule for the artificial neural network, the dataset including sizes and addresses of physical memory locations for the artificial neural network.
-
-
-
-
-
-
Search Results
7
records
(took 0.013 seconds)
