CURRENT LIMITING CIRCUIT
    1.
    发明申请
    CURRENT LIMITING CIRCUIT 有权
    电流限制电路

    公开(公告)号:US20140327419A1

    公开(公告)日:2014-11-06

    申请号:US14267957

    申请日:2014-05-02

    Inventor: Ni Zeng

    CPC classification number: G05F1/573

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    Abstract translation: 电流限制电路包括电流感测模块,其被配置为感测功率晶体管的输出电流并产生与输出电流成比例的相应感测电流。 耦合到电流感测模块的第一限流模块被配置为当功率晶体管的输出电流的变化超过第一电流电平时,基于感测电流产生第一极限电流。 耦合到电流感测模块的第二限流模块被配置为当功率晶体管的输出电流的变化超过第二电流电平时,基于感测电流产生第二极限电流。 耦合到第一和第二限流模块的转换模块和功率晶体管至少基于第一和第二限制电流来控制功率晶体管的栅极电压。

    TWO-STAGE ERROR AMPLIFIER WITH NESTED-COMPENSATION FOR LDO WITH SINK AND SOURCE ABILITY

    公开(公告)号:US20180011506A1

    公开(公告)日:2018-01-11

    申请号:US15679274

    申请日:2017-08-17

    Inventor: Ni Zeng

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

    TWO-STAGE ERROR AMPLIFIER WITH NESTED-COMPENSATION FOR LDO WITH
SINK AND SOURCE ABILITY
    3.
    发明申请
    TWO-STAGE ERROR AMPLIFIER WITH NESTED-COMPENSATION FOR LDO WITH SINK AND SOURCE ABILITY 有权
    具有针对LDO的消除补偿的两级错误放大器,具有吸收和源极性

    公开(公告)号:US20160187902A1

    公开(公告)日:2016-06-30

    申请号:US14592040

    申请日:2015-01-08

    Inventor: Ni Zeng

    CPC classification number: G05F1/575

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

    Abstract translation: 低压差放大器可以包括分别具有耦合到参考信号和反馈信号的第一和第二输入的误差放大器。 误差放大器可以被配置为基于参考信号和反馈信号之间的差异,分别在第一和第二输出处产生第一和第二误差信号,第一和第二误差信号。 宿台可以耦合到第一输出并且被配置为基于第一误差信号产生宿电流。 源级可以耦合到第二输出并被配置为基于第二误差信号产生源电流。 输出节点可以被耦合以接收信宿和源电流。

    Two-stage error amplifier with nested-compensation for LDO with sink and source ability

    公开(公告)号:US10725488B2

    公开(公告)日:2020-07-28

    申请号:US15679274

    申请日:2017-08-17

    Inventor: Ni Zeng

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

    Current limiting circuit
    5.
    发明授权

    公开(公告)号:US09778670B2

    公开(公告)日:2017-10-03

    申请号:US14267957

    申请日:2014-05-02

    Inventor: Ni Zeng

    CPC classification number: G05F1/573

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    DRIVER CIRCUIT WITH GATE CLAMP SUPPORTING STRESS TESTING
    6.
    发明申请
    DRIVER CIRCUIT WITH GATE CLAMP SUPPORTING STRESS TESTING 有权
    带门夹的驱动电路支持应力测试

    公开(公告)号:US20150381148A1

    公开(公告)日:2015-12-31

    申请号:US14449232

    申请日:2014-08-01

    Inventor: Ni Zeng

    Abstract: A generator circuit is coupled to apply a control signal the gate terminal of a power transistor driving an output node. A reference voltage is generated having a first voltage value as the reference for the control signal and having a second, higher, voltage value for use in stress testing. A clamping circuit is provided between the reference voltage and the power transistor gate to function in two modes. In one mode, the clamping circuit applies a first clamp voltage to clamp the voltage at the gate of the power transistor when the generator circuit is applying the control signal. In another mode, the clamping circuit applies a second, higher, clamp voltage to clamp the gate of the power transistor during gate stress testing.

    Abstract translation: 发电机电路被耦合以施加驱动输出节点的功率晶体管的栅极端子的控制信号。 产生参考电压,其具有第一电压值作为控制信号的基准,并具有用于应力测试的第二,较高的电压值。 在参考电压和功率晶体管栅极之间提供钳位电路,以在两种模式下起作用。 在一种模式中,当发电机电路施加控制信号时,钳位电路施加第一钳位电压以钳位功率晶体管的栅极处的电压。 在另一种模式下,钳位电路在栅极压力测试期间施加第二个较高的钳位电压来钳位功率晶体管的栅极。

    Driver circuit for driving power transistors
    7.
    发明授权
    Driver circuit for driving power transistors 有权
    用于驱动功率晶体管的驱动电路

    公开(公告)号:US09007101B2

    公开(公告)日:2015-04-14

    申请号:US14073494

    申请日:2013-11-06

    Inventor: Ni Zeng

    Abstract: A driver circuit for driving a power transistor includes a converter having a first transistor and a second transistor coupled in series between a supply node and a reference node. The converter is configured to receive a first signal and in response thereto generate a second signal for selectively controlling status of the power transistor. The ratio of a first leakage current of the first transistor to a second leakage current of the second transistor is used in the generation of the second signal which is applied to the control terminal of a transistor switch that is selectively actuated to turn off the power transistor.

    Abstract translation: 用于驱动功率晶体管的驱动电路包括具有串联耦合在供电节点和参考节点之间的第一晶体管和第二晶体管的转换器。 转换器被配置为接收第一信号,并响应于此产生用于选择性地控制功率晶体管状态的第二信号。 第一晶体管的第一泄漏电流与第二晶体管的第二漏电流之比用于产生施加到晶体管开关的控制端的第二信号,晶体管开关被选择性地致动以关断功率晶体管 。

    Current limiting circuit
    8.
    发明授权

    公开(公告)号:US10209725B2

    公开(公告)日:2019-02-19

    申请号:US15675872

    申请日:2017-08-14

    Inventor: Ni Zeng

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    CURRENT LIMITING CIRCUIT
    9.
    发明申请

    公开(公告)号:US20180017983A1

    公开(公告)日:2018-01-18

    申请号:US15675872

    申请日:2017-08-14

    Inventor: Ni Zeng

    CPC classification number: G05F1/573

    Abstract: A current limiting circuit includes a current sensing module that is configured to sense an output current of a power transistor and to generate a corresponding sensing current which is proportional to the output current. A first current limiting module coupled to the current sensing module is configured to generate a first limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a first current level. A second current limiting module coupled to the current sensing module is configured to generate a second limiting current based on the sensing current when a variation of the output current of the power transistor exceeds a second current level. A converting module coupled to the first and second current limiting modules and the power transistor controls a gate voltage of the power transistor based at least on the first and second limiting currents.

    Two-stage error amplifier with nested-compensation for LDO with sink and source ability

    公开(公告)号:US09772638B2

    公开(公告)日:2017-09-26

    申请号:US14592040

    申请日:2015-01-08

    Inventor: Ni Zeng

    CPC classification number: G05F1/575

    Abstract: A low dropout amplifier may include an error amplifier having first and second inputs coupled to a reference signal and a feedback signal, respectively. The error amplifier may be configured to generate first and second error signals at first and second outputs, respectively, with the first and second error signals based upon a difference between the reference signal and the feedback signal. A sink stage may be coupled to the first output and configured to generate a sink current based upon the first error signal. A source stage may be coupled to the second output and configured to generate a source current based upon the second error signal. An output node may be coupled to receive the sink and source currents.

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