公开(公告)号：US11356654B2

公开(公告)日：2022-06-07

申请号：US16514695

申请日：2019-07-17

Applicant: STMicroelectronics Asia Pacific Pte Ltd

Inventor： Hong Chean Choo ,  Lookah Chua ,  Wai Yin Hnin

IPC: H04N17/00 ,  G01R19/25 ,  G01R19/00 ,  G08G1/16

Abstract: An electronic device includes a test voltage generation circuit to generate a test voltage as a function of a regulator voltage, and a switching circuit to receive the test voltage and an image pixel output signal, and to pass the test voltage as output when in a test mode. A comparison circuit receives the output from the switching circuit and an analog to digital conversion signal, and asserts a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage. A counter begins counting at a beginning of each test cycle within the test mode, stops counting upon assertion of the counter rest signal, and outputs its count upon stopping counting. The count is proportional to the test voltage when in the test mode.

公开(公告)号：US10939094B2

公开(公告)日：2021-03-02

申请号：US16809926

申请日：2020-03-05

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics Asia Pacific Pte Ltd

Inventor： Lookah Chua ,  Jansen Reyes Duey ,  Tarek Lule ,  Mathieu Thivin

IPC: H04N17/00 ,  H04N5/369 ,  H04N5/3745 ,  B60W30/09 ,  G08G1/16

Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.

公开(公告)号：US11070754B1

公开(公告)日：2021-07-20

申请号：US16828423

申请日：2020-03-24

Applicant: STMicroelectronics Asia Pacific Pte Ltd. ,  STMicroelectronics (Alps) SAS

Inventor： Hongliang Zhang ,  Lookah Chua ,  Celine Mas ,  Wai Yin Hnin

IPC: H04N5/225 ,  H04N5/359 ,  H04N5/374

Abstract: In an embodiment, an image sensor includes: first and second voltage rails; first and second regulators configured to generate first and second regulated voltage at the first and second voltage rails, respectively; and a plurality of pixels coupled to the first and second voltage rails. Each pixel includes: first and second transistor coupled first and second storage capacitor, respectively. A third transistor is coupled between a control terminal of the first transistor and the first or second voltage rails. The third transistor is configured to limit a slew rate of current flowing between the control terminal of the second transistor and the first or second voltage rails to a first slew rate when the image sensor operates in global shutter mode, and to a second slew rate when the image sensor operates in rolling mode, the first slew rate being smaller than the second slew rate.