公开(公告)号：US20240266343A1

公开(公告)日：2024-08-08

申请号：US18418051

申请日：2024-01-19

Applicant: STMicroelectronics International N.V.

Inventor： Anuj BHARDWAJ ,  Anand Kumar MISHRA ,  Rohit Kumar GUPTA

IPC: H01L27/02 ,  H01L21/762 ,  H01L23/538 ,  H01L29/06

CPC classification number: H01L27/0207 ,  H01L21/76224 ,  H01L23/5386 ,  H01L29/0607

Abstract: An integrated circuit includes a semiconductor substrate patterned to include a first semiconductor track and a second semiconductor track separated from each other by a trench isolation region. The integrated circuit includes a logic circuit including a transistor having a first drain subregion in the first semiconductor track, a second drain subregion in the second semiconductor track, a first source subregion in the first semiconductor track, and a second source subregion in the second semiconductor track. A diffusion bridge of semiconductor material extends between the first and second semiconductor tracks and connects the first source subregion to the second source subregion. The first drain subregion and the second drain subregion are electrically connected by a drain metalization.