公开(公告)号：US20180241975A1

公开(公告)日：2018-08-23

申请号：US15958244

申请日：2018-04-20

Applicant: STMicroelectronics International N.V.

Inventor： Mahesh Chandra ,  Brejesh Lall

IPC: H04N9/04 ,  H04N5/347

CPC classification number: H04N9/045 ,  H04N5/347

Abstract: An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

公开(公告)号：US09979935B2

公开(公告)日：2018-05-22

申请号：US15730312

申请日：2017-10-11

Applicant: STMicroelectronics International N.V.

Inventor： Mahesh Chandra ,  Brejesh Lall

IPC: H04N9/45 ,  H04N5/347 ,  H04N9/04

CPC classification number: H04N9/045 ,  H04N5/347

Abstract: An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

公开(公告)号：US09819913B2

公开(公告)日：2017-11-14

申请号：US14836143

申请日：2015-08-26

Applicant: STMICROELECTRONICS INTERNATIONAL N.V.

Inventor： Mahesh Chandra ,  Brejesh Lall

IPC: H04N5/225 ,  H04N9/04 ,  H04N5/347

CPC classification number: H04N9/045 ,  H04N5/347

Abstract: An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

公开(公告)号：US10097799B2

公开(公告)日：2018-10-09

申请号：US15958244

申请日：2018-04-20

Applicant: STMicroelectronics International N.V.

Inventor： Mahesh Chandra ,  Brejesh Lall

IPC: H04N9/45 ,  H04N5/347 ,  H04N9/04

Abstract: An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

公开(公告)号：US20180035086A1

公开(公告)日：2018-02-01

申请号：US15730312

申请日：2017-10-11

Applicant: STMicroelectronics International N.V.

Inventor： Mahesh Chandra ,  Brejesh Lall

IPC: H04N9/04 ,  H04N5/347

CPC classification number: H04N9/045 ,  H04N5/347

Abstract: An image sensor device may include an array of image sensing pixels with adjacent image sensing pixels being arranged in macropixel, and a processor coupled to the array of image sensing pixels. The processor may be configured to receive pixel signals from the array of image sensing pixels, and arrange the received pixel signals into macropixel signal sets for respective macropixels. The processor may be configured to perform, in parallel, an image enhancement operation on the received pixel signals for each macropixel signal set to generate enhanced macropixel signals, and transmit the enhanced macropixel signals.

公开(公告)号：US09813731B2

公开(公告)日：2017-11-07

申请号：US14453006

申请日：2014-08-06

Applicant: STMicroelectronics International N.V.

Inventor： Santanu Chaudhury ,  Mona Mathur ,  Aditya Khandelia ,  Subarna Tripathi ,  Brejesh Lall ,  Sumantra Dutta Roy ,  Saurabh Gorecha

IPC: H04N7/12 ,  H04N19/587 ,  H04N19/139 ,  H04N19/159 ,  H04N19/61 ,  H04N19/12 ,  H04N19/132 ,  H04N19/14 ,  H04N19/17 ,  H04N19/20 ,  H04N19/436 ,  H04N19/23 ,  H04N19/543 ,  G06T7/215

CPC classification number: H04N19/587 ,  G06T7/215 ,  G06T2207/10016 ,  H04N19/12 ,  H04N19/132 ,  H04N19/139 ,  H04N19/14 ,  H04N19/159 ,  H04N19/17 ,  H04N19/20 ,  H04N19/23 ,  H04N19/436 ,  H04N19/543 ,  H04N19/61

Abstract: A video compression framework based on parametric object and background compression is proposed. At the encoder, an embodiment detects objects and segments frames into regions corresponding to the foreground object and the background. The object and the background are individually encoded using separate parametric coding techniques. While the object is encoded using the projection of coefficients to the orthonormal basis of the learnt subspace (used for appearance based object tracking), the background is characterized using an auto-regressive (AR) process model. An advantage of the proposed schemes is that the decoder structure allows for simultaneous reconstruction of object and background, thus making it amenable to the new multi-thread/multi-processor architectures.